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Gate CD Control for memory Chip using Total Process Proximity Based Correction Method

  • Nam, Byung--Ho (Memory R&D Division, Hynix Semiconductor Inc.) ;
  • Lee, Hyung-J. (Electronics Engineering Dept. Andong National University)
  • Received : 2002.09.10
  • Published : 2002.12.01

Abstract

In this study, we investigated mask errors, photo errors with attenuated phase shift mask and off-axis illumination, and etch errors in dry etch conditions. We propose that total process proximity correction (TPPC), a concept merging every process step error correction, is essential in a lithography process when minimum critical dimension (CD) is smaller than the wavelength of radiation. A correction rule table was experimentally obtained applying TPPC concept. Process capability of controlling gate CD in DRAM fabrication should be improved by this method.

Keywords

References

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