Disign Technique and Testability Analysis of High Speed Full-Swing BiCMOS Circuits

테스트가 용이한 고속 풀 스윙 BiCMOS회로의 설계방식과 테스트 용이도 분석

With the growth of BiCMOS technology in ASIC design, the issue of analyzing fault characteristics and testing techniques for BiCMOS circuits become more important In this paper, we analyze the fault models and characteristics of high speed full-swing BiCMOS circuits and the DFT technique to enhance the testability of full-swing high speed BiCMOS circuits is discussed. The SPICE simulation is used to analyze faults characteristics and to confirm the validity of DFT technique.