A New Poly-Si TFT Employing Air-Cavities at the Edge of Gate Oxide

게이트 산화막 가장자리에 Air-cavity를 가지는 새로운 구조의 다결정 실리콘 박막 트랜지스터

  • 이민철 (서울대 공과대 전기공학부) ;
  • 정상훈 (서울대 공과대 전기공학부) ;
  • 송인혁 (서울대 공과대 전기공학부) ;
  • 한민구 (서울대 공과대 전기공학부)
  • Published : 2001.08.01

Abstract

We have proposed and fabricated a new poly-Si TFT employing air-cavities at the edges of gate oxide in order to reduce the vertical electric field induced near the drain due to low dielectric constant of air. Air-cavity has been successfully fabricated by employing the wet etching of gate oxide and APCVD (Atmospheric pressure chemical vapor deposition) oxide deposition. Our experimental results show that the leakage current of the proposed TFT is considerably reduced by the factor of 10 and threshold voltage shift under high gate bias is also reduced because the carrier injection into gate insulator over the drain depletion region is suppressed.

Keywords

References

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