Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
권호 표지

An Electrical Repair Circuit for Yield Increment of High Density Memory

고집적 메모리의 yield 개선을 위한 전기적 구제회로

  • 김필중 (조선대학교 전자공학과) ;
  • 김종빈 (조선대학교 전자공학과)
  • Published : 2000.04.01
Download PDF
⟨ Previous Next ⟩

Abstract

Electrical repair method which has replaced laser repair method can replace defective cell by redundancy’s in the redundancy scheme of conventional high density memory. This electrical repair circuit consists of the antifuse program/read/latch circuits, a clock generator a negative voltage generator a power-up pulse circuit a special address mux and etc. The measured program voltage of made antifuses was 7.2~7.5V and the resistance of programmed antifuses was below 500 Ω. The period of clock generator was about 30 ns. The output voltage of a negative voltage generator was about 4.3 V and the current capacity was maximum 825 $mutextrm{A}$. An antifuse was programmed using by the electric potential difference between supply-voltage (3.3 V) and output voltage generator. The output pulse width of a power-up pulse circuit was 30 ns ~ 1$mutextrm{s}$ with the variation of power-up time. The programmed antifuse resistance required below 44 ㏀ from the simulation of antifuse program/read/latch circuit. Therefore the electrical repair circuit behaved safely and the yield of high densitymemory will be increased by using the circuit.

Keywords

References

  1. IEEE J. of Solid-State Circuits v.34 no.5 High-Speed DRAM Architecture Development Hiroaki Ikeda(et al.)
  2. IEEE J. of Solid-State Circuits v.31 no.4 Fault-Tolerant Designs for 256Mb DRAM Toshiaki Kirihata(et al.)
  3. IEEE J. of Solid-State Circuits v.26 no.11 Optimized Redundancy Selection Based on Failure-Related Yield Model for 64-Mb DRAM and Beyond Shigeru Kikuda(et al.)
  4. IEEE Electron Device Letters v.19 no.1 Laser Energy Limitation for Buried Metal Cuts Joseph B. Bernstein(et al.)
  5. IEEE Electron Device Letters v.15 no.8 Metal-to-Metal Antifuses with Very Thin Silicon Dioxide Films G. Zhang(et al.)
  6. Solid State Technology Quick-turn MCMs Herbert Stopper(et al.)
  7. NEC Res. & Develop v.38 no.1 156 Mbit Synchronous DRAM Kyoichi Nagata(et al.)
  8. 제6회 한국반도 학술대회 논문집 High Voltage Circuitry for Post Package DRAM Repair 김필중 외