Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Near-$V_{TH}$ Supply 64-Bit Adder using Bootstrapped CMOS Differential Logic

Bootstrapped CMOS Differential Logic 기술을 채용한 Near-$V_{TH}$ Supply에서 동작하는 64-Bit Adder 설계

  • Oh, Jae-Hyuk (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Jung, Byung-Hwa (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Kong, Bai-Sun (School of Information and Communication Engineering, Sungkyunkwan University)
  • 오재혁 (성균관대학교 정보통신공학부) ;
  • 정병화 (성균관대학교 정보통신공학부) ;
  • 공배선 (성균관대학교 정보통신공학부)
  • Published : 2008.06.18
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Abstract

This paper describes novel bootstrapped CMOS differential logic family operating at near-Vth supply voltage. The proposed logic family provides improved switching speed by utilizing voltage bootstrapping for the supply voltage approaching device thresholds. The circuit is configured as differential structure having single bootstrapping capacitor, minimizing area overhead and providing complete logic composition capability. A 64-bit adder designed using the proposed technique in a 0.18um CMOS process provides up to 79% improvement in terms of power-delay product as compared to the conventional adder designed with DCVS.

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