The DFM-Aware Design with Statistically-based Approaches in 130nm and below

  • Published : 2008.06.18

Abstract

As technology continues to scale down dramatically into 130nm and below, the impacts of process-induced variations on interconnect as well as device become more severe and significant in 130nm and below design. In order to predict changes of circuit characteristics due to process-induced variations accurately and efficiently, the DFM-Aware design environment has been developed and verified.

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