Design of a Frequency Synthesizer for UHF RFID Reader Application

UHF 대역 RFID 리더 응용을 위한 주파수합성기 설계

  • Kim, K.H. (Dept. of Electronic Engineering, University of Incheon) ;
  • Oh, K.C. (Dept. of Electronic Engineering, University of Incheon) ;
  • Park, D.S. (Dept. of Mechanical Engineering University of Incheon) ;
  • Yu, C.G. (Dept. of Electronic Engineering, University of Incheon)
  • Published : 2007.10.26

Abstract

This paper presents a 900MHz fractional-N frequency synthesizer for radio frequency identification (RFID) reader using $0.18{\mu}m$ standard CMOS process. The IC meets the EPC Class-1 Generation-2 and ISO-18000 Type-C standards. To minimize VCO pulling, the 900MHz VCO is generated by a 1.8GHz VCO followed by a frequency divider. The settling time of the synthesizer is less than $20{\mu}m$. The frequency synthesizer achieves the phase noise of -105.6dBc/Hz at 200kHz offset. The frequency synthesizer occupies an area of $1.8{\times}0.99mm^2$, and dissipates 8mA from a low supply voltage of 1.8V.

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