대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2006년도 하계종합학술대회
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- Pages.653-654
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- 2006
DRAM bus system을 위한 analog calibration 적용 Pre-emphasis Transmitter
- 발행 : 2006.06.21
초록
A Pre-emphasis transmitter for DRAM bus system has achieved 3.2Gbps/pin operation at 1.8V supply voltage with 0.18um CMOS process. The transmitter has 800MHz PLL to generate 4 phase clocks. The 4 phase clocks are used for input clock of PRBS and multiplexing. One tap pre-emphasis is used to reduce inter symbol interference (ISI) caused by channel low pass effects. The analog calibration makes the optimized driver impedance independent with the PVT variation.
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