Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference (한국전기전자재료학회:학술대회논문집)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
권호 표지

Effects of $SiO_2$ or SiON tunneling gate oxide on Au nano-particles floating gate memory

Au 나노 입자를 이용한 floating gate memory에서 $SiO_2$ or SiON 터널링 게이트 산화막의 영향

  • Koo, Hyun-Mo (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Lee, Woo-Hyun (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Cho, Won-Ju (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Koo, Sang-Mo (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Chung, Hong-Bay (Department of Electronic materials engineering, Kwangwoon Univ.) ;
  • Lee, Dong-Uk (Department of Physics, Hanyang Univ.) ;
  • Kim, Jae-Hoon (Department of Physics, Hanyang Univ.) ;
  • Lee, Min-Seung (Department of Physics, Hanyang Univ.) ;
  • Kim, Eun-Kyu (Department of Physics, Hanyang Univ.)
  • Published : 2010.04.01
Download PDF
⟨ Previous Next ⟩

Abstract

Floating gate non-volatile memory devices with Au nano-particles embedded in SiON or $SiO_2$ dielectrics were fabricated by digital sputtering method. The size and the density of Au are 4nm and $2{\times}10^{-12}cm^{-2}$, respectively. The floating gate memory of MOSFET with 5nm tunnel oxide and 45nm control oxide have been fabricated. This devices revealed a memory effect which due to proGrainming and erasing works perform by a gate bias stress repeatedly.

Keywords