대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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- Pages.81-83
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- 2006
IEEE 802-15.3a를 위한 Bit_Interleaver의 효율적인 설계 및 구현
An Efficient Design and Implementaion of Bit_Interleaver for IEEE 802.15,3a
- Kim, Tae-Ghi (Information Control Engineering Hoseo University) ;
- Cheong, Cha-Keun (Information Control Engineering Hoseo University)
- 발행 : 2006.04.29
초록
This Paper suggests efficient design method which is used by Bit_Inerleaver in the IEEE 802.15,3.a. Bit_Interleaver is consist of Symbol_Interleaver and Tone_Interleaver Each Interleaver is designed by using memory. In other to resolve burst error, Block Interleaver is using different leading and writing address for mixing the data. However This method has a different reading and writing memory address to realize Block Interleaver so this schematic is some complex. This Paper suggests efficient and simple Bit_Interleaver Method which classify the memory of Bit_Interleavr to reduce complexity of shcemeatic.