VHDL을 이용한 디지털 계전 알고리즘 구현에 관한 연구

A Study on the Implementation of Digital Protective Relay Algorithm using VHDL

  • 권오상 (성균관대학교, 차세대전력기술연구센터) ;
  • 허정용 (성균관대학교, 차세대전력기술연구센터) ;
  • 김철환 (성균관대학교, 차세대전력기술연구센터)
  • Kwon O. S. (Sungkyunkwan University, NPT Center) ;
  • Heo J. Y. (Sungkyunkwan University, NPT Center) ;
  • Kim C. H. (Sungkyunkwan University, NPT Center)
  • 발행 : 2004.07.14

초록

Nowadays, power customer has increased and new power plants have been constructed for market demands. However, increasement of power plants make power system more complex and unstable. For this reason, the stability problem is one of the most important issues in power systems. In this paper, a study on implementation of out-of-step detection algorithm is performed. The structure of digital relay is analyzed for development of out-of-step detection algorithm. DFT block which is used to extract basic frequency of voltage is analyzed to design VHDL.

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