Automatic classification of failure patterns in semiconductor EDS Test using pattern recognition

반도체 EDS공정에서의 패턴인식기법을 이용한 불량 유형 자동 분류 방법 연구

  • 한영신 (성균관대학교 정보통신공학부 컴퓨터공학과) ;
  • 황미영 (성균관대학교 정보통신공학부 컴퓨터공학과) ;
  • 이칠기 (성균관대학교 정보통신공학부 컴퓨터공학과)
  • Published : 2003.07.01

Abstract

Yield enhancement in semiconductor fabrication is important. It is ideal to prevent all the failures. However, when a failure occurs, it is important to quickly specify the cause stage and take countermeasure. The automatic method of failure pattern extraction from fail bit map provides reduced time to analysis and facilitates yield enhancement. This paper describes the techniques to automatically classifies a failure pattern using a fail bit map, a new simple schema which facilitates the failure analysis.

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