최소 자원을 사용하는 저전력 데이터 패스 할당 알고리즘

This paper presents a new algorithm for allocating the data path to achieve the minimum power consumption under the constraints of minimum hardware resources. In order to minimize the power consumption, the proposed algorithm tries to minimize the input transitions of functional units, unnecessary computations, and size of interconnects in a greedy manner during a]location. Experimental results using benchmarks indicate the proposed algorithm achieves 17.5% power reduction on average, when compared with the genesis-lp［1］high-level synthesis system.