Synthesis for Testability by Adding Transitions of Undefined States to State Transition Tables

  • Yotsuyanagi, Hiroyuki (Dept. of Electrical and Electronic Engineering, The Univ. of Tokushima) ;
  • Hashizume, Masaki (Dept. of Electrical and Electronic Engineering, The Univ. of Tokushima) ;
  • Tamesada, Takeomi (Dept. of Electrical and Electronic Engineering, The Univ. of Tokushima)
  • 발행 : 2000.07.01

초록

In this paper we propose procedures to enhance testability by modifying state transition tables. In these procedures, transitions about undefined states, which are not described in state transition tables but exist in a synthesized gate level circuit, are added to a state transition table. Experimental results for MCNC benchmarks are shown.

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