A Study of Pin-to-pin DC Parametric Test Modeling of VLSI Devices

VLSI 소자의 핀간 DC 파라메터 테스트 모델링 연구

According to increasing the integration of the device, there are important consideration about the improvement of the reliability in the product. To improve the reliability of the device, the test parameters and test time are increased. There are no pin-to-pin short test and pin-to-pin leakage test in the present test items to analysis the characteristics and reliability of the device. The purpose of the paper is to model the pin-to-pin phenomenon and propose to modify the test method present and to test the new pin-to-pin DC parameters. These modified and additive test items are applied to product test and confirmed to improve the reliability of product test.