A Modeling of CMOS Inverter for Maximum Power Dissipation Prediction

CMOS 인버터의 최대 전력소모 예측을 위한 모델링

Power Dissipation and circuit speed become the most importance parameters in VLSI system maximum power dissipation for VLSI system design. We remodeled CMOS inverter according to the operating region, saturation region or linear regin, and calculate maximum power dissipation point of CMOS inverter. The result of proposed maximum power dissipation model compared with those from SPICE simulation which results that the proposed maximum power dissipation model has the error rate within 10% to SPICE simulation.