Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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5, 10, $20\;{\mu}m$ Silicon Diaphgrams and Features Fabricated without Using An Etch Stop

에치스탑을 사용하지 않고 제작된 5, 10, $20\;{\mu}m$ 두께의 실리콘 박막과 구조물

  • Kwon, Yonung-Shin (School of Electrical Engineering, Seoul National University) ;
  • Cho, Dong-Il (School of Electrical Engineering, Seoul National University)
  • 권영신 (서울대학교 공과대학 전기공학부) ;
  • 조동일 (서울대학교 공과대학 전기공학부)
  • Published : 1996.07.22
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Abstract

Single-crystaIline silicon diaphgrams and features are fabricated without using an etch stop process. The process involves vertical dry etching, double-sided alignment, followed by wet-chemical etching from the back side. The abvantages of this process are that $5{\sim}50{\mu}m$ diaphgrams and features can be fabricated accurately and inexpensively. In addition, since no impurity-based process is introduced, highly uniform and homogenous properties can be achieved

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