• KIPS Transactions on Software and Data Engineering
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• v.9 no.8
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• pp.229-234
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• 2020

This paper presents the design and the implementation of CRESTIVE-DX, a concolic testing tool that distribute the concolic testing process over the embedded target system and the host system for efficient test generation of a target embedded program. CRESTIVE-DX conducts the execution of a target program on the target embedded system to consider possible machine-dependent behaviors of a target program execution, and conducts machine-independent parts, such as search-strategy heuristics, constraint solving, on host systems with high-speed computation unit, and coordinates their concurrent executions. CRESTIVE-DX is implemented by extending an existing concolic testing tool for C programs CREST. We conducted experiments with a test bed that consists of an embedded target system in the Arm Cortex A54 architecture and host systems in the x86-64 architecture. The results of experiments with Unix utility programs Grep, Busybox Awk, and Busybox Ed show that test input generation of CRESTIVE-DX is 1.59 to 2.64 times faster than that of CREST.

• Proceedings of the Korean Society of Computer Information Conference
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• 2019.07a
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• pp.325-326
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• 2019

본 논문은 퍼스널 컴퓨팅 환경의 성능 향상을 위한 인피니밴드 네트워크 기반 인메모리 스토리지 시스템의 구조를 제안한다. 성능평가를 위해 100Gbit/s을 지원하는 MCX455A-ECAT 한 쌍을 MCP1600-E02A 케이블로 직결한 x86-64 architecture의 인피니밴드 네트워크를 구성하고 Target 시스템에 iSCSI Extensions for RDMA(iSER)을 적용한 RAM disk를 생성하였다. CentOS virt-manager에서 생성한 Initiator 시스템의 Windows 가상 머신에는 Target 시스템의 RAM disk를 VirtIO 방식으로 연결한다. 이 구조는 시스템 종료 후 초기화되는 종래 RAM disk의 일반적 특성을 개선한다. 마지막으로 스토리지 성능평가를 통해 향후 출시될 PCI Express 4.0 이상의 시스템과 퍼스널 컴퓨팅 스토리지 성능 향상 측면에서 해당 구조의 적합성을 보인다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.33 no.5
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• pp.775-785
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• 2023

As processor technology advances, it has accelerated ISA extensions and increased the complexity of micro-architectures, leading to a continued rise in the importance of processor validation techniques. Recently, various fuzzing techniques have been introduced to discover undocumented instructions, and this study highlights the shortcomings of existing undocumented instruction fuzzing techniques and presents our observation on error cases in the latest processors from Intel and AMD. In particular, we analyzes the causes of false positives resulting from the fuzzer incorrectly judging CPU instruction length and proposes the length determination technique based on instruction execution information to improve accuracy.