• Title/Summary/Keyword: wafer grades

Search Result 1, Processing Time 0.017 seconds

Surface Defect Properties of Prime, Test-Grade Silicon Wafers (프라임, 테스트 등급 실리콘 웨이퍼의 표면 결함 특성)

  • Oh, Seung-Hwan;Yim, Hyeonmin;Lee, Donghee;Seo, Dong Hyeok;Kim, Won Jin;Kim, Ryun Na;Kim, Woo-Byoung
    • Korean Journal of Materials Research
    • /
    • v.32 no.9
    • /
    • pp.396-402
    • /
    • 2022
  • In this study, surface roughness and interfacial defect characteristics were analyzed after forming a high-k oxide film on the surface of a prime wafer and a test wafer, to study the possibility of improving the quality of the test wafer. As a result of checking the roughness, the deviation in the test after raising the oxide film was 0.1 nm, which was twice as large as that of the Prime. As a result of current-voltage analysis, Prime after PMA was 1.07 × 10 A/cm2 and Test was 5.61 × 10 A/cm2, which was about 5 times lower than Prime. As a result of analyzing the defects inside the oxide film using the capacitance-voltage characteristic, before PMA Prime showed a higher electrical defect of 0.85 × 1012 cm-2 in slow state density and 0.41 × 1013 cm-2 in fixed oxide charge. However, after PMA, it was confirmed that Prime had a lower defect of 4.79 × 1011 cm-2 in slow state density and 1.33 × 1012 cm-2 in fixed oxide charge. The above results confirm the difference in surface roughness and defects between the Test and Prime wafer.