• Proceedings of the Korean Society of Computer Information Conference
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• 2015.01a
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• pp.297-298
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• 2015

반도체 제조 및 FPD제조 공정 중 WAFER 및 GLASS 제품의 상태를 직접적으로 관리하는 기술로서 기존에 널리 사용하고 있는 방법은 CHAMBER의 온도나 상태 등의 설비 컨디션 상태를 관리 모니터링 하는 것이다. 반도체 제조의 공정비용을 최소화하기 위하여 기존 방법과 달리 WAFER 및 GLASS의 온도 상태 등을 직접적으로 모니터링 하는 시스템으로 반도체 FPD제조 공정 중 장비의 개별 특성에 따라 제품의 공정 편차로 인해 발생되는 공정불량을 실시간으로 모니터링함으로서 불량을 최소화 할 수 있는 시스템을 제안한다.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.421-426
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• 1989

Many of semiconductor manufacturing companies persuit automation of wafer fabrication to improve the yields and quality of their products. Development of real-time control system for wafer fabrication and wafer/cassette automatic transfer-system is the most important part to achieve the purpose. In this paper, SECS protocol proposed by SEMI is briefly reviewed and an implementation method of real-time monitoring and control system is suggested as one of the possible ways for wafer fabrication automation. The system consists of process equipments supporting SECS.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.81-87
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• 1994

We used IR laser inteferometric technique for measuring the temperature of wafer during cryogenic ECR etching. Using this technique, the effect of RF bias power and microwave power on the wafer temperature during etching period is investigated. As the RF bias power and microwave power was increased, the temperature of the wafer considerably increased and we concluded that to prevent the increase of substrate temperature during etching period, an adequate wafer cooling is needed.

• Proceedings of the Korean Society of Computer Information Conference
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• 2015.07a
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• pp.1-4
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• 2015

현재 고해상도 디스플레이 제품 생산은 대량 생산 공정 시스템으로 가동하고 있으며, 대량 생산 과정에서 WAFER의 제작 불량률을 낮추는 것이 생산업체에서 무엇보다도 주요한 목표이며 이와 함께 불량 제품을 정확하고 빠르게 검출하는 것이 매우 중요하다. 본 논문에서는 불량 WAFER을 정확하게 검출하기 위한 검출시스템으로 멀티 포인트 온도 검출 방법으로 구현된 면적형 온도 센서 기능과 검출된 데이터를 유/무선 통신방식으로 상위의 관리/모니터링 시스템으로 전송 할 수 있는 기능을 가진 마스터 콘트롤러 시스템을 제안한다.

• Transactions of the Korean Society of Mechanical Engineers
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• v.17 no.9
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• pp.2315-2328
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• 1993

The turbulence effect of particle deposition on a horizontal free-standing wafer in a vertical flow has been studied numerically by using the low-Reynolds-number k-.epsilon. turbulence model. For both the upper and lower surfaces of the wafer, predictions are made of the averaged particle deposition velocity and its radial distribution. Thus, it is now possible to obtain local information about the particle deposition on a free-standing wafer. The present result indicates that the particle deposition velocity on the lower surface of wafer is comparable to that on the upper one in the diffusion controlled deposition region in which the particle sizes are smaller than $0.1{\mu}m$. And it is found in this region that, compared to the laminar flow case, the averaged deposition velocity under the turbulent flow is about two times higher, and also that the local deposition velocity at the center of wafer is high equivalent to that the wafer edge.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1702-1703
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• 2011

MEMS 소자의 Wafer level Package 관련하여 Deep cavity를 가진 Cap Wafer와 Polymer bonding 중 cavity 단차로 인한 Polymer Patterning 및 접합 불량의 어려움을 극복할 수 있는 새로운 공정 flow를 제안하였다. Cavity를 형성할 때 사용하는 Si deep etching Mask인 기존의 Photoresist를 접합용 감광성 Polymer로 대체하고, cavity 형성 후, 별도의 추가 공정 없이 이 Polymer를 이용해 Wafer bonding을 진행하였다. 이를 통해 cavity 단차에 따른 문제를 해결함과 동시에 공정이 단순하고 제작 비용이 저렴하며, 신뢰성 있는 Wafer level Package를 구현하였다.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.5 no.2
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• pp.130-140
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• 1993

Average particle deposition velocity toward a horizontal semiconductor wafer in vertical airflow is measured by a wafer surface scanner(PMS SAS-3600). Use of wafer surface scanner requires very short exposure time normally ranging from 10 to 30 minutes, and hence makes repetition of experiment much easier. Polystyrene latex (PSL) spheres of diameter between 0.2 and $1.0{\mu}m$ are used. The present range of particle sizes is very important in controlling particle deposition on a wafer surface in industrial applications. For the present experiment, convection, diffusion, and sedimentation comprise important agents for deposition mechanisms. To investigate confidence interval of experimental data, mean and standard deviation of average deposition velocities are obtained from more than ten data set for each PSL sphere size. It is found that the distribution of mean of average deposition velocities from the measurement agrees well with the predictions of Liu and Ahn(1987) and Emi et al.(1989).

• Journal of the Semiconductor & Display Technology
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• v.5 no.2 s.15
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• pp.47-49
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• 2006

Various methods of making thin film is being used in semiconductor manufacturing process. The most common method in this field includes CVD(Chemical Vapor Deposition) and PVD(Physical Vapor Deposition). Thin film is deposited on both the backside and the frontside of wafers. The thin film deposited on the backside has poor thickness profile, and can contaminate wafers in the following processes. If wafers with the thin film remaining on the backside are immersed in batch type process tank, the thin film fall apart from the backside and contaminate the nearest wafer. Thus, it is necessary to etch the backside of the wafer selectively without etching the frontside, and chemical injection nozzle positioned under the wafer can perform the backside etching. In this study, the backside chemical injection nozzle with optimized chemical injection profile is built for single wafer tool. The evaluation of this nozzle, performed on $Si_3N_4$ layer deposited on the backside of the wafer, shows the etching rate uniformity of less than 5% at the etching rate of more than $1000{\AA}$.

• Particle and aerosol research
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• v.5 no.1
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• pp.17-27
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• 2009

Particle deposition on a semiconductor wafer larger than 100 mm was studied experimentally and numerically. Particularly the electrostatic effect on particle deposition velocity was investigated. The experimental apparatus consisted of a particle generation system, a particle deposition chamber and a wafer surface scanner. Experimental data of particle deposition velocity were obtained for a semiconductor wafer of 200 mm diameter with the applied voltage of 5,000 V and PSL particles of the sizes between 83 and 495 nm. The experimental data of particle deposition velocity were compared with the present numerical results and the existing experimental data for a 100 mm wafer by Ye et al. (1991) and Opiolka et al. (1994). The present numerical method took into consideration the particle transport mechanisms of convection, Brownian diffusion, gravitational settling and electrostatic attraction in an Eulerian frame of reference. Based on the comparison of the present experimental and numerical results with the existing experimental results the present experimental method for a 200 mm semiconductor wafer was found to be able to present reasonable data.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.22 no.2
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• pp.310-317
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• 2013

In this paper, the contact pressure of the wafer and polishing pad for final polishing process for 300 mm-wafer were investigated through numerical analysis using FEM tool, ANSYS. The distribution of the contact pressure is one of main parameters which affects on the flatness and surface roughness of polished wafers. Two types of polishing head, a hard type head with ceramic disk and a soft type head with air bag were considered. The effects of the deformation and initial shape of table on the contact pressure were also examined. Both heads and tables were modeled as 3D finite element model from solid model, and the material properties of polishing pads and rubber plate for the air-bag head were obtained from tensile tests. The contact pressure deviation on wafer surface was smaller with air bag head than hard type head even when the table had form errors such as convex or concave. From this 3D analysis, it could be concluded that the air-bag head has better uniformity of the contact pressure on wafer. Also, the effects of inner diameter of air bag and radial clearance between wafer and retainer were investigated as view point of contact pressure concentration on the edge of wafer.