• Proceedings of the KIEE Conference
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• 2007.10c
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• pp.172-174
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• 2007

An electronic watt-hour meter with high-precision measurement technology can provide many valuable metering data of a real-time system measurements, such as per-phase voltage, ampere, active power, reactive power, apparent power, power factor, and system frequency. Also many of accumulated metering data such as active energy, reactive energy, apparent energy, and load profile can be gettable from an electronic watt-hour meter[1]. This paper presents an approach of the small-sized AMR (Automatic Meter Reading) that provides customers with a very valuable electrical service. This AMR service transmits lots of a valuable metering data by using ZigBee communication module, so that users resided in their premises can use the information to audit a power quality and improve their electrical conditions by using the PQ monitoring device equipped with ZigBee receiver. This PQ monitoring device shows metering data on LCD and transmits to the PC through an internal network. Also, the device can keep the valuable meter data into a built-in non-volatile memory. The final goal of this paper is to better understand the power quality of electrical systems and offer the power qualify information for the convenience of all power consumers.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.4
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• pp.88-95
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• 2013

A new droop control method which can be applied to 3-phase 4-wire uninterruptible power supply is proposed in this paper. The droop control method for parallel operation is very attractive one as UPS parallel operation can be carried out without any data communication devices provided among UPS systems connected, but it reportedly shows a PnP(plug-and-play) problem. A basic reason why a circulating current could flow among parallel-connected UPS systems is clearly investigated as well when droop-controlled-ups systems are operated in the manner of PnP. The proposed algorithm is deduced from the investigated result and is basically structured to keep a balanced frequency and balanced voltage profile against power variation. This paper shows that balanced parallel operation of droop control method can be obtained under unbalanced load as well as balanced load conditions when PnP operation is needed and load change occurs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.12
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• pp.996-1002
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• 2000

Ferroelectric (Ba, Sr) TiO$_3$(BST) thin films have attracted much attention for use in new capacitor materials of dynamic random access memories (DRAMs). In order to apply BST to the DRAMs, the etching process for BST thin film with high etch rate and vertical profile must be developed. However, the former studies have the problem of low etch rate. In this study, in order to increase the etch rate, BST thin films were etched with a magnetically enhanced inductively coupled plasma(MEICP) that have much higher plasma density than RIE (reactive ion etching) and ICP (inductively coupled plasma). Experiment was done by varying the etching parameters such as CF$_4$/(CF$_4$+Ar) gas mixing ratio, rf power, dc bias voltage and chamber pressure. The maximum etch rate of the BST films was 170nm/min under CF$_4$/CF$_4$+Ar) of 0.1, 600 W/-350 V and 5 mTorr. The selectivities of BST to Pt and PR were 0.6 and 0.7, respectively. Chemical reaction and residue of the etched surface were investigated with X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS).

• Journal of the Korean Electrochemical Society
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• v.15 no.3
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• pp.149-153
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• 2012

The $Cu_2O/TiO_2$ inverse opal heterojunction arrays were developed by electrochemical deposition of $Cu_2O$ nanoparticles on $TiO_2$ inverse opal arrays. The $Cu_2O$ nanoparticles completely filled the inner pores of $TiO_2$ inverse opal film (prepared by liquid phase deposition with an average thickness of 400 nm) and covered the entire area; exhibiting high crystalline properties of anatase and cubic phase from $TiO_2$ and $Cu_2O$, respectively. From asymmetric current-voltage profile, it was noticeable that a heterojunction was well formed for charge transport from $Cu_2O$ to $TiO_2$ film resulting from the enhanced charge separation yield. In addition, increased photocurrent of 0.19 $mA/cm^2$ (versus 0.08 $mA/cm^2$ under dark condition) was obtained at -0.35 V from the heterojunction structure in the 0.5M $Na_2SO_4$ solution.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.12
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• pp.1134-1139
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• 2006

Electrical, optical, and structural properties of indium zinc oxide (IZO) anode films grown by a RF magnetron sputtering were investigated as functions of RF power and working pressure in pure Ar ambient. To investigate electrical, optical and structural properties of IZO anode films, 4-point probe and UV/VIS spectrometry, and X-ray diffraction (XRD) were performed, respectively. A sheet resistance of $15.2{\Omega}/{\square}$, average transmittance above 80 % in visible range, expecially above 85 % in 550 nm, and root mean square roughness of 1.13 nm were obtained from optimized IZO anode films grown in oxygen free ambient. All samples show amorphous structure regardless of RF power and working pressure due to low substrate temperature. In addition, XPS depth profile obtained from IZO/PES exhibits that there is no obvious evidence of interfacial reaction between IZO and PES substrate. Furthermore, current-voltage-luminance of the flexible phosphorescent flexible OLEDs fabricated on IZO anode shows dependence on sheet resistance of the IZO anode. These results indicate that the IZO anode is a promising candidate to substitute conventional ITO anode for high-quality flexible displays.

• Proceedings of the KIEE Conference
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• 2000.11a
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• pp.180-183
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• 2000

The Battery Energy Storage System(BESS) has lots of advantages such as load levelling, quick response emergency power(spinning reserve), frequency and voltage control, improvement of reliability, and deferred generation and transmission construction. The economic feasibility requires justification from the customer side of meter to promoting the dissemination of BESS nationally. In this paper, we proposed the economic assessment model of customer owned Battery Energy Storage System(BESS) which is complemented and improved the existing model. The proposed model is applied to the typical customer type(light-industrial commercial, and residential) which are taken from the statistical analysis on the load profile survey of Korea Electric Power COmpany (KEPCO). The economic assessment performed for each customer type to justifying their economic feasibility of BESS installation from the economic measures such as payback period, overall benefits, ROI, and ROR. The results of this paper are useful to the customer investment decision making and the national energy policy & strategy.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.83-83
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• 2008

Metal-oxide-silicon-on-insulator (MOSOI) structures were fabricated to study the effect caused by reactive ion etching (RIE) and sacrificial oxidation process on silicon-on-insulator (SOI) layer. The MOSOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching treatment. The measured C-V curves were compared to the numerical results from 2-dimensional (2-D) simulations. The measurements revealed that the profile of C-V curves significantly changes depending on the SOI surface condition of the MOSOI capacitors. The shift in the measured C-V curves, due to the difference of the fixed oxide charge ($Q_f$), together with the numerical simulation analysis and atomic force microscopy (AFM) analysis, allowed extracting the fixed oxide charges ($Q_f$) in the structures as well as 2-D carrier distribution profiles.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.136-147
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• 2009

In this paper we analyze the influence of source/drain (S/D) extension region design for minimizing short channel effects (SCEs) in 25 nm gate length single and double gate Silicon-on-Insulator (SOI) and Germanium-on-Insulator (GOI) MOSFETs. A design methodology, by evaluatingm the ratio of the effective channel length to the natural length for the different devices (single or double gate FETs) and technology (SOI or GOI), is proposed to minimize short channel effects (SCEs). The optimization of non-overlapped gate-source/drain i.e. underlap channel architecture is extremely useful to limit the degradation in SCEs caused by the high permittivity channel materials like Germanium as compared to that exhibited in Silicon based devices. Subthreshold slope and Drain Induced Barrier Lowering results show that steeper S/D gradients along with wider spacer regions are needed to suppress SCEs in GOI single/double gate devices as compared to Silicon based MOSFETs. A design criterion is developed to evaluate the minimum spacer width associated with underlap channel design to limit SCEs in SOI/GOI MOSFETs.

• Proceedings of the KSME Conference
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• 2001.06a
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• pp.854-859
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• 2001

An eigenvalue analysis of a tunable micro-mechanical actuator is presented. The actuator is modeled as a continuum structure. The eigenvalue modified by the tuning voltage is computed through the linearization of the relation between the electrostatic force and the displacement at the equilibrium. A staggered algorithm is employed to perform the coupled analysis of the electrostatic and elastic fields. The stiffness matrix of the actuator is modified at this equilibrium state. The displacement field is perturbed using an eigenmode profile of the actuator. The configuration change of the actuator due to perturbation modifies the electrostatic field and thus the electrostatic force. The equivalent stiffness matrix corresponding to the perturbation and the change in the electrostatic force is then added to stiffness matrix in order to explain natural frequency shifting. The numerical examples are presented and compared with the experiments in the literatures.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.292-292
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• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.