• Title/Summary/Keyword: tunneling

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Theoretical Study of the Strong Field Emission of Electrons inside a Nanogap Due to an Enhanced Terahertz Field

  • Choi, Soo Bong;Byeon, Clare Chisu;Park, Doo Jae
    • Current Optics and Photonics
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    • v.2 no.6
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    • pp.508-513
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    • 2018
  • We report the development of a theoretical model describing the strong field tunneling of electrons in an extremely small nanogap (having a width of a few nanometers) that is driven by terahertz-pulse irradiation, by modifying a conventional semiclassical model that is widely applied for near-infrared wavelengths. We demonstrate the effects of carrier-envelope phase difference and strength of the incident THz field on the tunneling current across the nanogap. Additionally, we show that the dc bias also contributes to the generation of tunneling current, but the nature of the contribution is completely different for different carrier-envelope phases.

Compact Capacitance Model of L-Shape Tunnel Field-Effect Transistors for Circuit Simulation

  • Yu, Yun Seop;Najam, Faraz
    • Journal of information and communication convergence engineering
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    • v.19 no.4
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    • pp.263-268
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    • 2021
  • Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

Sub-10 nm Ge/GaAs Heterojunction-Based Tunneling Field-Effect Transistor with Vertical Tunneling Operation for Ultra-Low-Power Applications

  • Yoon, Young Jun;Seo, Jae Hwa;Cho, Seongjae;Kwon, Hyuck-In;Lee, Jung-Hee;Kang, In Man
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.172-178
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    • 2016
  • In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.