• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.11-11
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• 2010

Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.828-831
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• 2005

Producing high transparency dielectric is still one of the most important subjects in the PDP process for improving luminous efficiency. It has been reported by many workers that transparency is improved by controlling the composition of the frit, the frit size and distribution, and the firing atmosphere. To understand the mechanism of discoloration of frit, $Bi_2O_3$ and $B_2O_3$ glasses were used for a leaching test using water and alcohol solution in milling. As a result, the frit prepared by wet milling had lower chemical durability than that prepared by dry milling. The leached layer around the frit showed high stability for heat treatment because the frit surface was covered with hydroxides or hydrates which was resulted from a reaction between the frit and the solution during milling.

• 한국전기전자재료학회논문지
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• 제18권4호
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• pp.344-349
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• 2005

The optical and electrical characteristics of plasma display panel(PDP) using the vacuum in-line sealing technology compared with the conventional sealing process in this research. This PDP consisted of MgO protecting layer by e-beam evaporation and battier rib, transparent dielectric layer, dielectric layer, and electrodes by screen printer and then sealed off on Ne-Xe(4 ％) 400 Torr and 430。C. The brightness and luminous efficiency were good as the base vacuum level was higher, and it was to check the advantage of high vacuum level sealing, one of the strong points of the vacuum in-line sealing process. However, the brightness and luminous efficiency was dropped sharply because of a crack on MgO protecting layer by the difference of the expansion and contraction stress on high temperature in the vacuum states between MgO and substrate. Fortunately, the crack was prevented by MgO was deposited on higher temperature than 300。C. Finally, the PDP, was fabricated by the vacuum in-line sealing process, resulted the lower brightness than processing only the thermal annealing treatment in the vacuum chamber, but the luminous efficiency was increased by the reducing power consumption with the decreasing luminous current. The vacuum in-line sealing technology was not to need the additional thermal annealing process and could reduce the fabrication process and bring the excellent optical and electrical properties without the crack of MgO protecting layer than the conventional sealing process.

• 한국재료학회지
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• 제13권2호
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• pp.101-105
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• 2003

In this study, we have investigated the availability of the electroless Ni-B plating for a diffusion barrier of the bus electrode. The Ni-B layer of 1$\beta$: thick was electroless deposited on the electroplated Cu bus electrode for AC plasma display. The layer was to encapsulate Cu bus electrode to prevent from its oxidation and to serve as a diffusion barrier against Cu contamination of the transparent dielectric layer in AC plasma display. The microstructure of the as-plated barrier layer was made of an amorphous phase and the structure was converted to crystalline at about 30$0^{\circ}C$. The concentration of boron was about 5∼6 wt.% in the electroless Ni-B deposit regardless of DMAB concentration. The electroless Ni-B deposit was coated on the surface of the electroplated Cu bus electrode uniformly. And the electroless Ni-B plating was found to be an appropriate process to form the diffusion barrier.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.170-170
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• 2010

Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.311-311
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• 2013

The resistance switching memory devices have several advantages to take breakthrough for the limitation of operation speed, retention, and device scale. Especially, the metal-oxide materials such as ZnO are able to fabricate on the flexible and visible transparent plastic substrate. Also, the quantum dots (QDs) embedded in dielectric layer could be improve the ratio between the low and the high resistance becauseof their Coulomb blockade, carrier trap and induced filament path formation. In this study, we irradiated 0.2-MeV-electron beam on the ZnO/QDs/ZnO structure to control the defect and oxygen vacancy of ZnO layer. The metal-oxide QDs embedded in ZnO layer on Pt/glass substrate were fabricated for a memory device and evaluated electrical properties after 0.2-MeV-electron beam irradiations. To formation bottom electrode, the Pt layer (200 nm) was deposited on the glass substrate by direct current sputter. The ZnO layer (100 nm) was deposited by ultra-high vacuum radio frequency sputter at base pressure $1{\times}10^{-10}$ Torr. And then, the metal-oxide QDs on the ZnO layer were created by thermal annealing. Finally, the ZnO layer (100 nm) also was deposited by ultra-high vacuum sputter. Before the formation top electrode, 0.2 MeV liner accelerated electron beams with flux of $1{\times}10^{13}$ and $10^{14}$ electrons/$cm^2$ were irradiated. We will discuss the electrical properties and the physical relationships among the irradiation condition, the dislocation density and mechanism of resistive switching in the hybrid memory device.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회A
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• pp.1087-1090
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• 2008

This paper presents the electro-luminescence (EL) display lamp which is patterned on a curved surface by the pad printing method. The printing methods, including the gravure, screen, flexo, inkjet, and pad printing, have an advantage of one-step direct patterning. However, in general, the printing and semi-conductor process, except pad printing method, cannot be applied for patterning on a curved surface. Thus, in this paper, we used pad printing method for patterning an EL display lamp on a curved surface. The EL display lamp consists of 5 layers: Bottom electrode; Dielectric layer; Phosphor; Transparent electrode; Bus electrode. Finally, we printed EL display lamp on a dish, which has a radius of curvature 80mm. The EL display lamp was driven at AC 200V of 1kHz.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.341-341
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• 2012

Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.161-161
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• 2009

Ion bombarded inorganic materials for LC alignment has been researched as it provides controllability in a nonstop process for producing high-resolution displays. Many optically transparent insulators such as $SiOx$ and a-C:H have been investigated as potential candidates for inorganic alignment materials. Even so, LC orientation on a new material with superior capacity is required to produce high-performance displays. Many inorganic materials with high permittivities can reduce the voltage losses due to the LC alignment layer that are a trade-off for its capacitance. The minimum voltage for device operation can be applied to the LC under low external voltage using these materials. This means that low power consumption for LCD applications can be achieved using a high-k alignment structure in which the LC can be driven effectively with a low threshold voltage. Among the many other potential high-k oxides, HfO2 is considered to be one of the most promising due to its remarkable properties of high dielectric constant, relatively low leakage current, large band gap (5.68 eV), and high transparency. Due to these characteristics, HfO2 can be used in LC alignment to increase the capacitance of the inorganic alignment layer for low-voltage driving of LCs.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.630-630
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• 2013

Recently, atomically smooth hexagonal boron nitride(h-BN) known as a white graphene has drawn great attention since the discovery of graphene. h-BN is a III-V compound and has a honeycomb structure very similar to graphene with smaller lattice mismatch. Because of strong covalent sp2bonds like graphene, h-BN provides a high thermal conductivity and mechanical strength as well as chemical stability of h-BN superior to graphene. While graphene has a high electrical conductivity, h-BN has a highly dielectric property as an insulator with optical band gap up to 6eV. Similar to the graphene, h-BN can be applied to a variety of field, such as gate dielectric layers/substrate, ultraviolet emitter, transparent membrane, and protective coatings. However, up until recently, obtaining and controlling good quality monolayer h-BN layers have been too difficult and challenging. In this work, we investigate the controlled synthesis of h-BN layers according to the growth condition, time, temperature, and gas partial pressure. h-BN is obtained by using chemical vapor deposition on Cu foil with ammonia borane (BH3NH3) as a source for h-BN. Scanning Transmission Electron Microscopy (STEM, JEOL-JEM-ARM200F) is used for imaging and structural analysis of h-BN layer. Sample's surface morphology is characterized by Field emission scanning electron microscopy (SEM, JEOL JSM-7100F). h-BN is analyzed by Raman spectroscopy (HORIBA, ARAMIS) and its topographic variations by Atomic force microscopy (AFM, Park Systems XE-100).