• Journal of the Korean Wood Science and Technology
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• 제52권3호
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• pp.276-288
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• 2024

This study was conducted to reproduce the woodworking process of Baekje wooden storage facilities. Green timber of Quercus spp. was processed using ancient woodworking tools, and the tool-trace formed in this process were compared with the tool-trace of actual excavated artifacts. In the tool-trace analysis, the length and shape of the tool-trace were objectively recorded using a 3D Scan, and that were difficult to confirm with photograph were confirmed through stereoscopic microscope. As a result, there were two types of adze's tool-trace. One of them is minute straight Blade-top trace line when trimming the wood surface and the other is Plucked trace that appear when strongly chop at the wood. When a chisel bat was not used, a long and wide continuous shape blade trace was produced. And when the chisel head was struck with the chisel bat, a straight blade-top trace was regularly observed. Saw-trace was identified in several layers with fine straight stripes. Through this, it was found that the tool-trace of the woodworking tools, which is estimated to have been used in each process, and the tool-trace remaining in the Baekje wooden storage facility coincide.

• 전자공학회논문지C
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• 제35C권3호
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• pp.24-31
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• 1998

This paper presents a pipeline high-level synthesis tool for designing trace-back systolic array viterbi decoder. It consists of a dta flow graph(DFG) generator and a pipeline data path synthesis tool. First, the DFG of the vitrebi decoder is generated in the from of VHDL netlist. The inputs to the DFG generator are parameters of the convolution encoder. Next, the pipeline scheduling and allocationare performed. The synthesis tool explores the design space efficiently, synthesizes various designs which meet the given constraints, and choose the best one.

• 정보처리학회논문지A
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• 제12A권1호
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• pp.1-6
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• 2005

본 논문에서는 trace-back systolic array Viterbi algorithm의 저전력 생존 메모리 구현에 관한 새로운 알고리즘을 소개한다. 이 알고리즘의 핵심 아이디어는 trace back 연산의 수를 줄이기 위하여 이미 생성된 trace-back routes를 재사용하는 것이다. 그리고 trace-back unit의 불필요한 switching activity가 발생하는 영역을 gate-clock을 사용하여 전력소모를 줄이는 것이다. Synopsys Power Estimation 툴인 Design Power를 이용하여 전력소모를 측정하였고, 그 결과 [1]의 논문에서 소개된 trace-back unit 비하여 평균 $40{\%}$ 전력감소가 있었고, $23{\%}$의 면적증가를 보였다.

• 한국가구학회지
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• 제26권1호
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• pp.51-60
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• 2015

Interior designer Sugimoto Takashi uses salvaged material and natural thing for aesthetical purpose. These material performs not just as fun stuff but as design tool in order to set up cultural meaning which modern society always lacks for. The method of communicating the meaning is the multi-layered trace on them. There are three types of trace. They are harsh texture of surface, untrimmed outline, and gathering & arrangement. Through these formation methods of trace, Sugimoto can suggest various curtural meanings such as vanishing value of old-fashioned lifestyle, primitive energy of nature, and sincere touch of somebody. As a result, the trace in Sugimoto's design is an endeavor to exist tradition(the long ago) and nature(the far away) in here-and-now interior space.

• 한국정밀공학회지
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• 제16권7호
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• pp.203-209
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• 1999

In this paper, we present the methods to predict the milled surface shapes in profile milling process. In the cutting process, tools are deflected due to the cutting forces varying with the imposed depth of cut and feedrate. Thus, the final shapes of the milled surface, generated by the nominal tool trajectory, are different from the required profile. In order to predict the milled surface shapes, we present two methods based on: (1) the deflected tool profile and (2) the trace of contact point between the tool and the workpiece. In the first method, we make an assumption that the milled surface corresponds to the deflected tool profile. In another method, we make we make an assumption that the milled surface is generated by the trace of the contact point between the cutting edge of the tool and workpiece. We present the surface generation process by calculating the trajectory of the contact points on the workpiece. Several simulations and experiments are performed to verify the proposed milled surface prediction methods.

• 정보교육학회논문지
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• 제2권2호
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• pp.245-251
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• 1998

본 논문에서는 RDL/PAL 인터페이스와 사건표현식을 지원하는 성능 감시 도구를 설계하였다. RDL/PAL은 성능 감시 도구의 사건 추적층과 성능 분석층간의 인터페이스를 제공하고, 임의의 추적 양식에 접근하여 사건 데이터를 추출해낼 수 있다. 또한, 사건표현식은 일반적인 프로그래밍 언어와 유사한 형태로 구성되어 프로그래머가 원하는 성능 분석 결과를 쉽게 얻을 수 있다. 프로그래머는 본 논문에서 구현한 성능 감시 도구를 이용하여 추적 양식에 관계없이 다양한 성능 분석을 할 수 있다는 장점을 가지고 있다.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.78-83
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• 2023

This paper proposes a lightweight trace-driven Processing-In-Memory (PIM) simulator, TP-Sim. TP-Sim is a General Purpose PIM (GP-PIM) simulator that evaluates various PIM system performance-related metrics. Based on instruction and memory traces extracted from the Intel Pin tool, TP-Sim can replay trace files for multiple models of PIM architectures to compare its performance. To verify the availability of TP-Sim, we estimated three different system configurations on the STREAM benchmark. Compared to the traditional Host CPU-only systems with conventional memory hierarchy, simple GP-PIM architecture achieved better performance; even the Host CPU has the same number of in-order cores. For further study, we also extend TP-Sim as a part of a heterogeneous system simulator that contains CPU, GPGPU, and PIM as its primary and co-processors.

• 한국인터넷방송통신학회논문지
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• 제16권5호
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• pp.191-196
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• 2016

최근에 이르러, 임베디드 시스템 및 모바일 장치 뿐만이 아니라 고성능 마이크로프로세서 및 멀티코어프로세서의 전력 소비량이 매우 중요하게 대두되고 있다. 특히, 스마트폰과 태블릿 PC의 광범위한 사용으로 인하여 프로세서의 저전력 소비가 무엇보다 요구된다. 본 논문에서는 고성능 마이크로프로세서에 대하여 빠른 속도를 갖는 명령어 자취형 (trace-driven) 모의실험기 기반의 전력 측정기를 개발하였다. 본 전력 측정기는 마이크로프로세서를 구성하는 복합 조합회로, 배열구조, CAM 구조를 기반으로 하였으며, SPEC 2000 벤치마크를 입력으로 모의실험을 수행하여 각 벤치마크의 평균 전력 소비량을 측정하였다.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2001년도 추계학술대회(한국공작기계학회)
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• pp.14-18
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• 2001

Rise in cutting force causes tool damage and worsens product quality resulting in machining accuracy deterioration. Especially, fragile material cutting brings about breakage of material and worsens product surface quality. In this study, we trace the locus of cutting force and examine the machined surface corresponding to the cutting force loci. and build up a monitoring system for deciding normal operation or not of cutting process.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2011년도 추계학술발표대회
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• pp.514-516
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• 2011

최근 지식 정보화 사회에 있어서 컴퓨터 네트워크 개방화와 함께 컴퓨터 시스템의 보안 위협이 급증하였다. 또한 기본적으로 데이터 보호에 초점을 맞추고 있기 때문에 접근에 대한 제한이 없으며 응용 프로그램에 따라 보안 운영방식이 다르다는 취약점을 가지고 있다. 본 논문은 하드웨어 기반 보안상태 모니터링 가시화를 위하여 TCG에서 제안한 TPM 칩을 기반으로 동작하는 컴퓨팅 환경의 신뢰 상태 및 시스템 자원에 대한 상태 정보를 실시간으로 모니터링하고 분기 추적 모니터링을 통해 논리적 에러의 초기위치를 파악하여 가시화한다.