• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.12
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• pp.2213-2220
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• 2017

This paper proposes an efficient approach for hardware implementation of moving object detection (MOD) processor using effective Gaussian mixture learning (EGML)-based background subtraction method. Arithmetic units used in background generation were implemented using LUT-based approximation to reduce hardware complexity. Hardware resources used for both background subtraction and Gaussian probability density calculation were shared. The MOD processor was verified by FPGA-in-the-loop simulation using MATLAB/Simulink. The MOD performance was evaluated by using six types of video defined in IEEE CDW-2014 dataset, which resulted the average of recall value of 0.7700, the average of precision value of 0.7170, and the average of F-measure value of 0.7293. The MOD processor was implemented with 882 slices and block RAM of $146{\times}36kbits$ on Virtex5 FPGA, resulting in 60% hardware reduction compared to conventional design based on EGML. It was estimated that the MOD processor could operate with 75 MHz clock, resulting in real-time processing of $800{\times}600$ video with a frame rate of 39 fps.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12A
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• pp.2000-2011
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• 2001

In this Paper, we convert conventional low speed(1x, 6x) DVD systems designed by analog PLL(Phase Locked Loop) into digital PLL to operate at high speed systems flexibly, and present optimal DPLL model in high speed(20x) DVD systems. Especially, we focused on the design of DPLL that can overcome channel effects such as bulk delay, sampling clock frequency offset and asymmetry phenomenon in high speed DVD systems. First, the modified Early-Late timing error detector as digital timing recovery scheme is proposed. And the four-sampled compensation algorithm using zero crossing point as asymmetry compensator is designed to achieve high speed operation and strong reliability. We show that the proposed timing recovery algorithm provides enhanced performances in jitter valiance and SNR margin by 4 times and 3dB respectively. Also, the new four-sampled zero crossing asymmetry compensation algorithm provides 34% improvement of jitter performance, 50% reduction of compensation time and 2.0dB gain of SNR compared with other algorithms. Finally, the proposed systems combined with asymmetry compensator and DPLL are shown to provide improved performance of about 0.4dB, 2dB over the existing schemes by BER evaluation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.397-409
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• 2003

This paper describes an implementation of radix-4 trellis parallel architecture and backward state transition control trace back Viterbi decoder, and presents the application results to high speed wireless LAN. The radix-4 parallelized architecture Vietrbi decoder can not only improve the throughput with simple structure, but also have small processing delay time and overhead circuit compared to M-step trellis architecture one. Based on these features, this paper addresses a novel Viterbi decoder which is composed of branch metric computation, architecture of ACS and trace back decoding by sequential control of backward state transition for the implementation of radix-4 trellis parallelized structure. With the proposed architecture, the decoding of variable code rate due to puncturing the base code can easily be implemented by the unified Viterbi decoder. Moreover, any additional circuit and/or peripheral control logic are not required in the proposed decoder architecture. The trace back decoding scheme with backward state transition control can carry out the sequential decoding according to ACS cycle clock without additional circuit for survivor memory control. In order to evaluate the usefulness, the proposed method is applied to channel CODEC of the IEEE 802.11a high speed wireless LAN, and HDL coding simulation results are presented.

• Korean Journal of Occupational Health Nursing
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• v.10 no.2
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• pp.174-182
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• 2001

This study was performed to find out the differences between noise levels of hospital wards and the nurses efforts for noise management in some general hospitals. The hospital wards selected were the intensive care unit(ICU), the emergency room(ER), the nursery room(NR), the internal medicine(IM), the general surgery(GS) among the 5 general hospitals located in Seoul. The data were collected from August 3 to September 13, 1999 through questionnaire survey and noise measurement in each nursing station of hospital wards. Data analysis was done by SPSS 8.0 package among the 305 questionnaires and 24 hours monitored noise levels. Frequency, Chi-square and ANOVA test were used. The study results were as belows: 1. The noise level measured by 24 hours monitoring survey were exceeded on the standard limit in all the hospital wards. Data also showed that noise levels were significantly different in each ward among the three shifts working duties. 2. The subjects were all female nurses. They were mostly working in the ICU ward(28.9%). They were 26~30 years old (43.9%), junior college graduates(57.0%), working for 1~5 years(55.1%) as staff-nurse(85.6%). There were no significant differences between hospital wards and general characteristics of nurses. 3. The noise levels perceived by nurses were regarded as 'Highly noisy'(56.4%), especially during the 11:30 and 15:30 (30.2%) o'clock. Data also showed that noise education was not ever given to nurses(89.9%). Nurses also responded that they hardly put an effort to reduce noise level(54.8%). However, there were significant differences between wards and noisy working time, experience of noise education and level of effort for noise reduction. 4. Nurses also perceived the ventilator alarm and EKG-alarm as the most disturbing sounds in the ICU, human voice and telephone ringing in the ER, human voice and EKG-alarming in the NR, human voices and telephone ringing in IM and GS both wards respectively in order. There were significant differences between hospital wards and noise making factors. 5. Nurses were shown that they regarded highly 'Sound reduction of the human voice', 'Careful handling on medical instruments', and 'Immediate appliances on alarming materials' as the practical method for noise management. There were significant differences between hospital wards and behavioral practical efforts for noise management. According to that results, the statistical differences were shown in the 24 hour monitored noise levels in each ward. Also, nurses perceived the noise severity differently and they approached variously on the practical efforts for noise reduction in each ward. Thus, author thinks that concrete and systematic endeavor will be necessary for noise reduction and management in hospitals for better working and healing environment for both of patients and staffs.

• Journal of Korea Water Resources Association
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• v.44 no.12
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• pp.991-1000
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• 2011

The relationship between discharge (Q) and suspended sediment (SS) concentration often is used for the estimation of inflow SS concentration in reservoir turbidity modeling in the absence of actual measurements. The power function, SS=aQb, is the most commonly used empirical relation to determine the SS load assuming the SS flux is controlled by variations of discharge. However, Q-SS relation typically is site specific and can vary depending on the season of the year. In addition, the relation sometimes shows hysteresis during rising limb and falling limb for an event hydrograph. The objective of this study was to examine the hysteresis of Q-SS relationships through continuous field measurements during flood events at inflow rivers of Yongdam Reservoir and Soyang Reservoir, and to analyze its effect on the bias of SS load estimation. The results confirmed that Q-SS relations display a high degree of scatter and clock-wise hysteresis during flood events, and higher SS concentrations were observed during rising limb than falling limb at the same discharge. The hysteresis caused significant bias and underestimation of SS loading to the reservoirs when the power function is used, which is important consideration in turbidity modeling for the reservoirs. As an alternative of Q-SS relation, turbidity-SS relation is suggested. The turbidity-SS relations showed less variations and dramatically reduced the bias with observed SS loading. Therefore, a real-time monitoring of inflow turbidity is necessary to better estimate of SS influx to the reservoirs and enhance the reliability of reservoir turbidity modeling.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.3C
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• pp.398-407
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• 2004

In this paper, a blind watermarking method which is suitable to the video compression using 2-D discrete wavelet transform was proposed and implemented into the hardware using VHDL(VHSIC Hardware Description Language). The goal of the proposed watermarking algorithm is the authentication about the manipulation of the watermark embedded image and the detection of the error positions. Considering the compressed video image, the proposed watermarking scheme is unrelated to the quantization and is able to concurrently embed or extract the watermark. We experimentally verified that the lowest frequency subband(LL4) is not sensitive to the change in the spatial domain, so LL4 subband was selected for the mark space. And the combination of the bitplanes which has the properties of both the minimum degradation of the image and the robustness was chosen as the embedded Point in the mark space in LL4 subband. Since we know the watermark embedded positions and the watermark is embedded by not varying the value but changing the value, the watermark can be extracted without the original image. Also, for the security when exposing the watermark embedded position, we embed the encrypted watermark by the block cipher. The proposed watermark algorithm shows the robustness against the general image manipulation and is easily transplanted into the image or video compressor with the minimal changing in the structure. The designed hardware has 4037 LABs(24％) and 85 ESBs(3％) in APEX20KC EP20K400CF672C7 FPGA of Altera and stably operates in 82MHz clock frequency.

• Korean Journal of Cognitive Science
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• v.27 no.3
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• pp.469-499
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• 2016

The present study investigated the cognitive mechanism underlying online processing of Korean syntactic (for example, A bed/a clock belongs to/doesn't belong to the furniture "침대는/시계는 가구에 속한다/속하지 않는다") and lexical negation (for example, A tiger/a butterfly has/doesn't have a tail "호랑이는/나비는 꼬리가 있다/없다") using an ERP(Event-related potentials) technique and a truth-value verification task. 23 Korean native speakers were employed for the whole experiment and 15's brain responses (out of 23) were recorded for the ERP analysis. The behavioral results (i.e. verification task scores) show that there is universal pattern of the accuracy and response time for verification process: True-Affirmative (high accuracy and short latency) > False-Affirmative > False-Negated > True-Negated. However, the components (early N400 & P600) reflecting the immediate processing of a negation operator were observed only in lexical negation. Moreover, the ERP patterns reflecting an effect of truth value were not identical: N400 effect was observed in the true condition compared to the false condition in the lexically negated sentences, whereas Positivity effect (like early P600) was observed in the false condition compared to the true condition in the syntactically negated sentences. In conclusion, the form and location of negation operator varied by languages and negation types influences the strategy and pattern of online negation processing, however, the final representation resulting from different computational processing of negation appears to be language universal and is not directly affected by negation types.

• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.70-75
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• 2014

Recently, the demand for high-integrated, low-powered, and high-powered SoC design has been increasing due to the multi-functionality and the miniaturization of digital devices and the high capacity of service informations. With the rapid evolution of the system, the required hardware performances have become diversified, the FPGA system has been increasingly adopted for the rapid verification, and SoC system using the FPGA and the ARM core for control has been growingly chosen. While the AXI bus is used in these kinds of systems in various ways, it is traditionally designed with AXI slave structure. In slave structure, there are problems with the CPU resources because CPU is continually involved in the data transfer and can't be used in other jobs, and with the decreased transmission efficiency because the time not used of AXI bus beomes longer. In this paper, an efficient AXI master interface is proposed to solve this problem. The simulation results show that the proposed system achieves reductions in the consumption clock by an average of 51.99% and in the slice by 31% and that the maximum operating frequency is increased to 107.84MHz by about 140%.

• Journal of Korean Society of Forest Science
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• v.63 no.1
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• pp.21-27
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• 1984

This study was to investigate the diurnal changes of shoot water potentials and the characteristics of xylem conductivity of branch in several conifers. The results obtained are as follows: 1) The diurnal shoot water potentials fluctuated with the sunlight intensities, and increase in shoot water potential lagged behind two hours as compared with the time of sunlight decrease in tree crown. 2) The shoot water potential reached the daily maximum ai twelve to fourteen o'clock in the afternoon, and the maximum shoot water potentials were -22 bar in Larix leptolepis, -18 bar in Pinus koraiensis, -15 bar in Pinus densiflora, -14 bar in Abies holophylla, and -10 in Pinus rigida. 3) The average gradient of shoot water potential per one meter height (${\varphi}_L/m$) in tree crown was -1.7 bar/m in Pinus koraiensis while that of Larix leptolepis was -2.1 bar/m. 4) The average of relative xylem conductivities (K, $cm^2/hr{\cdot}atm$) in branches was 2878 in Larix leptolepis, 2763 in Pinus rigida, 2652 in Pinus densiflora, and 2113 in Pinus koraiensis.

• Archives of design research
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• v.11 no.1
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• pp.237-244
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• 1998

Rapid prototyping is an efficient method to evaluate the usability of electric home appliances. However, the use of rapid prototyping method in usability tests has not been sufficiently validated. The purpose of this study was to validate computer-generated prototypes whether they can replace real products in usability tests. The control-display panel of a refrigerator was selected for this study. Sixteen female subjects participated in a between-subjects experiment: Eight subjects of them used the real refrigerator while others used the computer-generated prototype of the refrigerator. The difference between the refrigerator and the prototype was analyzed in terms of task failure rate, task completion time, and the number of buttons pressed for three typical tasks: clock setting, selecting an operation mode for refrigerating room, and selecting an rapid freezing mode. The results of a non-parametric statistical test showed that the prototype was not significantly different from the real refrigerator. Therefore, the rapid prototyping technique can be applied to the usability tests for the simple electric home appliances such as the refrigerator.