• Proceedings of the Korean Society of Precision Engineering Conference
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• 2001.04a
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• pp.865-868
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• 2001

We designed and fabricated a planner-type thermoelastic microactuator with a latch-up operation for optical switching. Latch-up actuation is prerequisite to implement an optical switch with low power consumption and high reliability. The proposed microactuator consists of four cantilever-shaped thermal actuators, four displacement linkages, two shallow arch-shaped leaf springs, a mobile shuttle mass with a micromirror, and four elastic boundaries. The structural layer of the planar microactuator is phosphorous-doped 12$\mu\textrm{m}$-thick polysilicon, and the sacrificial layer is LTO(Low Temperature Oxide) of 3$\mu\textrm{m}$thickness. The displacement of actuator is as large as 3$\mu\textrm{m}$when the length of actuation bar is 100$\mu\textrm{m}$in length at 5V input voltage. The proposed microactuators have advantages of easy assembly with other optical component by way of fiber alignment in the substrate plane, and its fabrication process features simplicity while retaining batch-fabrication economy.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.293.1-293.1
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• 2016

Various materials including conductive, dielectric, and semi-conductive materials, constitute suitable candidates for printed electronics. Metal nanoparticles (e.g. Ag, Cu, Ni, Au) are typically used in conductive ink. However, easily oxidized metals, such as Cu, must be processed at low temperatures and as such, photonic sintering has gained significant attention as a new low-temperature processing method. This method is based on the principle of selective heating of a strongly absorbent film, without light-source-induced damage to the transparent substrate. However, Cu nanoparticles used in inks are susceptible to the growth of a native copper-oxide layer on their surface. Copper-oxide-nanoparticle ink subjected to a reduction mechanism has therefore been introduced in an attempt to achieve long-term stability and reliability. In this work, a flash-light sintering process was used for the reduction of an inkjet-printed Cu(II)O thin film to a Cu film. Using a photographic lighting instrument, the intensity of the light (or intense pulse light) was controlled by the charged power (Ws). The resulting changes in the structure, as well as the optical and electrical properties of the light-irradiated Cu(II)O films, were investigated. A Cu thin film was obtained from Cu(II)O via photo-thermal reduction at 2500 Ws. More importantly, at one shot of 3000 Ws, a low sheet resistance value ($0.2527{\Omega}/sq.$) and a high resistivity (${\sim}5.05-6.32{\times}10^{-8}{\Omega}m$), which was ~3.0-3.8 times that of bulk Cu was achieved for the ~200-250-nm-thick film.

• Journal of the Korean Ceramic Society
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• v.49 no.5
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• pp.404-411
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• 2012

The reliability of solid oxide fuel cells (SOFCs) particularly depends on the high quality of solid oxide electrolytes. The application of thinner electrolytes and multi electrolyte layers requires a more reliable characterization method. Most of the investigations on thin film solid electrolytes have been made for the parallel transport along the interface, which is not however directly related to the fuel cell performance of those electrolytes. In this work an array of ion-blocking metallic Ti/Au microelectrodes with about a $160{\mu}m$ diameter was applied on top of an ultrathin ($1{\mu}m$) yttria-stabilized-zirconia/gadolinium-doped-ceria (YSZ/GDC) heterolayer solid electrolyte in a micro-SOFC prepared by PLD as well as an 8-${\mu}m$ thick YSZ layer by screen printing, to study the transport characteristics in the perpendicular direction relevant for fuel cell operation. While the capacitance variation in the electrode area supported the working principle of the measurement technique, other local variations could be related to the quality of the electrolyte layers and deposited electrode points. While the small electrode size and low temperature measurements increaseed the electrolyte resistances enough for the reliable estimation, the impedance spectra appeared to consist of only a large electrode polarization. Modulus representation distinguished two high frequency responses with resistance magnitude differing by orders of magnitude, which can be ascribed to the gadolinium-doped ceria buffer electrolyte layer with a 200 nm thickness and yttria-stabilized zirconia layer of about $1{\mu}m$. The major impedance response was attributed to the resistance due to electron hole conduction in GDC due to the ion-blocking top electrodes with activation energy of 0.7 eV. The respective conductivity values were obtained by model analysis using empirical Havriliak-Negami elements and by temperature adjustments with respect to the conductivity of the YSZ layers.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.34 no.1
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• pp.1-7
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• 2024

β-Ga₂O₃ is a material with a wide band gap of ~4.8 eV and a high breakdown-voltage of 8 MV/cm, and is attracting much attention in the field of power device applications. In addition, compared to representative WBG semiconductor materials such as SiC, GaN and Diamond, it has the advantage of enabling single crystal growth with high growth rate and low manufacturing cost [1-4]. In this study, we succeeded in growing a 10 mm thick β-Ga₂O₃ single crystal doped with 0.3 mol% SnO₂ through the EFG (Edge-defined Film-fed Growth) method using multi-slit structure. The growth direction and growth plane were set to [010]/(010), respectively, and the growth speed was about 12 mm/h. The grown β-Ga₂O₃ single crystal was cut into various crystal planes (010, 001, 100, ${\bar{2}}01$) and surface processed. The processed samples were compared for characteristics according to crystal plane through analysis such as XRD, UV/VIS/NIR/Spec., Mercury Probe, AFM and Etching. This research is expected to contribute to the development of power semiconductor technology in high-voltage and high-temperature applications, and selecting a substrate with better characteristics will play an important role in improving device performance and reliability.