• KSTLE International Journal
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• v.5 no.2
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• pp.37-43
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• 2004

Abstract : Nano/micro-scale friction properties were investigated on Si (100) and three self-assembled monolayers (SAMs) (PFOTC, DMDM, DPDM) coated on Si-wafer by chemical vapor deposition technique. Experiments were conducted at ambient temperature(24$pm$1$circ$C) and humidity(45$pm$5%). Friction at nano-scale was measured using Atomic Force Microscopy (AFM) in the range of 0-40nN normal loads. In both Si-wafer and SAMs, friction increased linearly as a function of applied normal load. Results showed that friction was affected by the inherent adhesion in Ssi-wafer, and in the case of SAMs the physical/chemical structures had a major influence. Coefficient of friction of these test samples at the micro-scale was also energies. In order to study the effect of contact area on coefficient of friction at the micro-scale, friction was measured for Si-wafer and DPDM against Soda Lime balls (Duke Scientiffic Corporation) of different radii (0.25 mm, 0.5 mm and 1 mm) at different applied normal loads (1500, 3000 and 4800 mN). Results showed that Si-wafer had higher coefficient of friction than DPDM. Further, unlike that in the case of DPDM, friction in Si-wafer was severely influenced by its wear. SEM evidences showed that solid-solid adhesion was the wear mechanism in Si-wafer.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.1
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• pp.27-31
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• 2009

In this paper, the polymer adhesive bonding technology using wafer-level technology was investigated and warpage results were analyzed. Si and glass wafer was bonded after adhesive polymer layer and dam pattern for uniform state was patterned on glass wafer. In this study, warpage result decreased as the low of bonding temperature of Si wafer, bonding pressure and height of adhesive bonding layer. The availability of adhesive polymer bonding was confirmed by TC, HTC, Humidity soak test after dicing. The result is that defect has not found without reference to warpage.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2001.06a
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• pp.127-134
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• 2001

Nano adhesion and friction between a Sj$_3$N$_4$ AFM tip and thin silver films were experimentally studied. Tests were performed to measure the nano adhesion and friction in both AFM(atomic force microscope) and LFM(lateral force microscope) modes in various ranges of normal load. Thin silver films deposited by IBAD (ion beam assisted deposition) on Si-wafer (100) and Si-wafer of different surface roughness were used. Results showed that nano adhesion and friction decreased as the surface roughness increased. When the Si surfaces were coated by pure silver, the adhesion and friction decreased. But the adhesion and friction were not affected by the thickness of IBAD silver coating. As the normal force increased, the adhesion forces of bare Si-wafer and IBAD silver coating film remained constant, but the friction forces increased linearly. Test results suggested that the friction was mainly governed by the adhesion as long as the normal load was low.

• Journal of Sensor Science and Technology
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• v.12 no.6
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• pp.265-272
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• 2003

This paper describes anodic bonding characteristics of MLCA (Multi Layer Ceramic Actuator) to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with same properties were deposited on MLCA under optimum RF magneto conditions(Ar 100%, input power $1\;W/cm^2$). After annealing in $450^{\circ}C$ for 1 hr, the anodic bonding of MLCA and Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in - 760 mmHg. Then, the MLCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity is 0.05-0.08 %FS. Moreover, any damages or separation of MLCA/Si bonded interfaces do not occur during actuation test. Therefore, it is expected that anodic bonding technology of MLCA/Si wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.160-163
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• 2003

This paper describes on anodic bonding characteristics of MLCA(Multi Layer Ceramic Actuator) to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with same properties were deposited on MLCA under optimum RF magneto conditions(Ar 100 %, input power $1\;/cm^2$). After annealing in $450^{\circ}C$ for 1 hr, the anodic bonding of MLCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in - 760 mmHg. Then, the MLCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity is 0.05-008 %FS. Moreover, any damages or separation of MICA/Si bonded interfaces do not occur during actuation test. Therefore, it is expected that anodic bonding technology of MICA/Si wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.3
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• pp.15-19
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• 2003

In This paper, we developed 1.96 GHz air gap type FBAR BPF using ZnO as piezoelectric sputtered by RF magnetron at room temperature. FBAR BPF was fabricated by sputtering bottom electrode (Al), ZnO as piezoelectric and top electrode (Mo) on Si wafer one by one with RF magnetron sputter, then Si was dry etched to make an air hole. XRD test result of fabricated FBAR BPF showed that ZnO crystal was well pre-oriented as (002) and sigma value of XRC was 1.018. IL(Insertion loss) showed excellent result as 1 dB.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.433-433
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• 2012

As the requirement in patterning geometry continuously shrinks down, the termination of etch process at the exact time became crucial for the success in nano patterning technology. By virtue of real-time optical emission spectroscopy (OES), etch end point detection (EPD) technique continuously develops; however, it also faced with difficulty in low open ratio etching, typically in self aligned contact (SAC) and one cylinder contact (OCS), because of very small amount of optical emission from by-product gas species in the bulk plasma glow discharge. In developing etching process, one may observe that coupon test is being performed. It consumes costs and time for preparing the patterned sample wafers every test in priority, so the coupon wafer test instead of the whole patterned wafer is beneficial for testing and developing etch process condition. We also can observe that etch open area is varied with the number of coupons on a dummy wafer. However, this can be a misleading in OES study. If the coupon wafer test are monitored using OES, we can conjecture the endpoint by experienced method, but considering by data, the materials for residual area by being etched open area are needed to consider. In this research, we compare and analysis the OES data for coupon wafer test results for monitoring about the conditions that the areas except the patterns on the coupon wafers for real-time process monitoring. In this research, we compared two cases, first one is etching the coupon wafers attached on the carrier wafer that is covered by the photoresist, and other case is etching the coupon wafers on the chuck. For comparing the emission intensity, we chose the four chemical species (SiF2, N2, CO, CN), and for comparing the etched profile, measured by scanning electron microscope (SEM). In addition, we adopted the Dynamic Time Warping (DTW) algorithm for analyzing the chose OES data patterns, and analysis the covariance and coefficient for statistical method. After the result, coupon wafers are over-etched for without carrier wafer groups, while with carrier wafer groups are under-etched. And the CN emission intensity has significant difference compare with OES raw data. Based on these results, it necessary to reasonable analysis of the OES data to adopt the pre-data processing and algorithms, and the result will influence the reliability for relation of coupon wafer test and whole wafer test.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.545-545
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• 2008

Poly-Si is an essential material for floating gate in NAND Flash memory. To fabricate this material within region of floating gate, chemical mechanical polishing (CMP) is commonly used process for manufacturing NAND flash memory. We use colloidal silica abrasive with alkaline agent, polymeric additive and organic surfactant to obtain high Poly-Si to SiO2 film selectivity and reduce surface defect in Poly-Si CMP. We already studied about the effects of alkaline agent and polymeric additive. But the effect of organic surfactant in Poly-Si CMP is not clearly defined. So we will examine the function of organic surfactant in Poly-Si CMP with concentration separation test. We expect that surface roughness will be improved with the addition of organic surfactant as the case of wafering CMP. Poly-Si wafer are deposited by low pressure chemical vapor deposition (LPCVD) and oxide film are prepared by the method of plasma-enhanced tetra ethyl ortho silicate (PETEOS). The polishing test will be performed by a Strasbaugh 6EC polisher with an IC1000/Suba IV stacked pad and the pad will be conditioned by ex situ diamond disk. And the thickness difference of wafer between before and after polishing test will be measured by Ellipsometer and Nanospec. The roughness of Poly-Si film will be analyzed by atomic force microscope.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.11a
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• pp.11-11
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• 2004

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.9
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• pp.825-831
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• 2006

As an increase of chip complexity and level of chip integration, chip input/output (I/O) pad pitches are also drastically reduced. With arrival of high complexity SoC (System on Chip) and SiP (System in Package) products, conventional horizontal type probe card showed its limitation on probing density for wafer level test. To enhance probing density, we proposed new vertical type probe card that has the $70{\mu}m$ probe needle with tungsten wire in $80{\mu}m$ micro-drilled hole in ceramic board. To minimize alignment error, micro-drilling conditions are optimized and epoxy-hardening conditions are also optimized to minimize planarity changes. To apply wafer level test for target devices (T5365 256M SDRAM), designed probe card was characterized by probe needle tension for test, contact resistance measurement, leakage current measurement and the planarity test. Compare to conventional probe card with minimum pitch of $50{\sim}125{\mu}m\;and\;2\;{\Omega}$ of average contact resistance, designed probe card showed only $22{\mu}$ of minimum pitch and $1.5{\Omega}$ of average contact resistance. And also, with the nature of vertical probing style, it showed comparably small contact scratch and it can be applied to bumping type chip test.