• Title/Summary/Keyword: synthesis algorithm

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An Implementation of Acoustic Echo Canceller Using Adaptive Filtering in Modulated Lapped Transform Domain (Modulated Lapped Transform 영역에서 적응 필터링을 이용한 음향 반향 제거기의 구현)

  • 백수진;박규식
    • The Journal of the Acoustical Society of Korea
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    • v.22 no.6
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    • pp.425-433
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    • 2003
  • Acoustic Echo Canceller (AEC) is a signal processing system for removing unwanted echo signals in teleconference and hands-free communication. Least mean square (LMS) algorithm is one of the adaptive echo cancellation algorithms and it has been most attractive because of its simplicity and robustness. However, the convergence properties of the LMS algorithm degrade with highly correlated input signals such as speech. For this reason, transform-domain adaptive filtering algorithm was introduced to decorrelate the colored input samples by using the orthogonal transform matrix such as DCT, DFT and then LMS adaptive filtering process is applied. In this paper, we propose a MLT domain adaptive echo canceller base on the MLT (Modulated lapped Transform) orthogonal transform matrix. The proposed algorithm achieves high decorrelation efficiency and fast convergence speed via modulated lapped transform of size 2NXN instead of NXN unitary transform such as DCT, DFT, Hadamad and it is applied to the acoustical echo cancellation system. Form the computer simulation with both synthesis and real speech, the proposed MLT domain adaptive echo canceller shows approximately twice faster convergence speed and 20∼30 ㏈ ERLE improvements over the DCT frequency domain acoustic echo cancellation system.

Development of CPLD technology mapping algorithm for Sequential Circuit under Time Constraint (시간제약 조건하에서 순차 회로를 위한 CPLD 기술 매핑 알고리즘 개발)

  • Youn, Chung-Mo;Kim, Hi-Seok
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.1
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    • pp.224-234
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    • 2000
  • In this paper, we propose a new CPLD technology mapping algorithm for sequential circuit under time constraints. The algorithm detects feedbacks of sequential circuit, separate each feedback variables into immediate input variable, and represent combinational part into DAG. Also, among the nodes of the DAG, the nodes that the number of outdegree is more than or equal to 2 is not separated, but replicated from the DAG, and reconstructed to fanout-free-tree. To use this construction method is for reason that area is less consumed than the TEMPLA algorithm to implement circuits, and process time is improved rather than TMCPLD within given time constraint. Using time constraint and delay of device the number of partitionable multi-level is defined, the number of OR terms that the initial costs of each nodes is set to and total costs that the costs is set to after merging nodes is calculated, and the nodes that the number of OR terms of CLBs that construct CPLD is excessed is partitioned and is reconstructed as subgraphs. The nodes in the partitioned subgraphs is merged through collapsing, and the collapsed equations is performed by bin packing so that if fit to the number of OR terms in the CLBs of a given device. In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces the number of CLBs bu 15.58% rather than the TEMPLA, and reduces process time rather than the TMCPLD.

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Efficient 3D Object Simplification Algorithm Using 2D Planar Sampling and Wavelet Transform (2D 평면 표본화와 웨이브릿 변환을 이용한 효율적인 3차원 객체 간소화 알고리즘)

  • 장명호;이행석;한규필;박양우
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.5_6
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    • pp.297-304
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    • 2004
  • In this paper, a mesh simplification algorithm based on wavelet transform and 2D planar sampling is proposed for efficient handling of 3D objects in computer applications. Since 3D vertices are directly transformed with wavelets in conventional mesh compression and simplification algorithms, it is difficult to solve tiling optimization problems which reconnect vertices into faces in the synthesis stage highly demanding vertex connectivities. However, a 3D mesh is sampled onto 2D planes and 2D polygons on the planes are independently simplified in the proposed algorithm. Accordingly, the transform of 2D polygons is very tractable and their connection information Is replaced with a sequence of vertices. The vertex sequence of the 2D polygons on each plane is analyzed with wavelets and the transformed data are simplified by removing small wavelet coefficients which are not dominant in the subjective quality of its shape. Therefore, the proposed algorithm is able to change the mesh level-of-detail simply by controlling the distance of 2D sampling planes and the selective removal of wavelet coefficients. Experimental results show that the proposed algorithm is a simple and efficient simplification technique with less external distortion.

The Performance Improvement of PLC by Using RTP Extension Header Data for Consecutive Frame Loss Condition in CELP Type Vocoder (CELP Type Vocoder에서 RTP 확장 헤더 데이터를 이용한 연속적인 프레임 손실에 대한 PLC 성능개선)

  • Hong, Seong-Hoon;Bae, Myung-Jin
    • The Journal of the Acoustical Society of Korea
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    • v.29 no.1
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    • pp.48-55
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    • 2010
  • It has a falling off in speech quality, especially when consecutive packet loss occurs, even if a vocoder implemented in the packet network has its own packet loss concealment (PLC) algorithm. PLC algorithm is divided into transmitter and receiver algorithm. Algorithm in the transmitter gives superior quality by additional information. however it is impossible to provide mutual compatibility and it occurs extra delay and transmission rate. The method applied in the receiver does not require additional delay. However, it sets limits to improve the speech quality. In this paper, we propose a new method that puts extra information for PLC in a part of Extension Header Data which is not used in RTP Header. It can solve the problem and obtain enhanced speech quality. There is no extra delay occurred by the proposed algorithm because there is a jitter buffer to adjust network delay in a receiver. Extra information, 16 bits each frame for G.729 PLC, is allocated for MA filter index in LP synthesis, excitation signal, excitation signal gain and residual gain reconstruction. It is because a transmitter sends speech data each 20 ms when it transfers RTP payload. As a result, the proposed method shows superior performance about 13.5%.

Hierrachical manner of motion parameters for sports video mosaicking (스포츠 동영상의 모자익을 위한 이동계수의 계층적 향상)

  • Lee, Jae-Cheol;Lee, Soo-Jong;Ko, Young-Hoon;Noh, Heung-Sik;Lee Wan-Ju
    • The Journal of Information Technology
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    • v.7 no.2
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    • pp.93-104
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    • 2004
  • Sports scene is characterized by large amount of global motion due to pan and zoom of camera motion, and includes many small objects moving independently. Some short period of sports games is thrilling to televiewers, and important to producers. At the same time that kinds of scenes exhibit exceptionally dynamic motions and it is very difficult to analyze the motions with conventional algorithms. In this thesis, several algorithms are proposed for global motion analysis on these dynamic scenes. It is shown that proposed algorithms worked well for motion compensation and panorama synthesis. When cascading the inter frame motions, accumulated errors are unavoidable. In order to minimize these errors, interpolation method of motion vectors is introduced. Affined transform or perspective projection transform is regarded as a square matrix, which can be factorized into small amount of motion vectors. To solve factorization problem, we preposed the adaptation of Newton Raphson method into vector and matrix form, which is also computationally efficient. Combining multi frame motion estimation and the corresponding interpolation in hierarchical manner enhancement algorithm of motion parameters is proposed, which is suitable for motion compensation and panorama synthesis. The proposed algorithms are suitable for special effect rendering for broadcast system, video indexing, tracking in complex scenes, and other fields requiring global motion estimation.

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Development of Reliability-Based Optimum Design of High-Speed Railway Bridges Considering Structure-Rail Longitudinal Interaction and Structure-Vehicle Interaction Using Heuristic Decision Method (Heuristic Decision Method를 이용하여 구조물-궤도 종방향 상호작용 및 구조물-차량 상호작용을 고려한 고속철도 교량의 신뢰성 최적설계 기법 개발)

  • Ihm, Yeong-Rok
    • Journal of the Korean Society of Hazard Mitigation
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    • v.10 no.3
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    • pp.31-38
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    • 2010
  • In this study, it is suggested that it has to reliability-based design methodology with respect to bridge structure-rail longitudinal interaction and bridge structure-vehicle interaction. For the structural analysis, commercial package, ABAQUS, are used for a three-dimensional finite element analysis. The optimization process utilizes a well-known optimizer, ADS(Automated Design Synthesis). Optimization technique is utilized the ALM-BFGS method for global area search and Golden Section Method for 1-D search. In general, ALM-BFGS method don't need the 1-D search, and that algorithm converge a 0.1~0.2 of Push-Off factor. But in this study, value of Push-Off factor is used 90, therefore 1-D search should be needed for effective convergency. That algorithm contains the "heuristic decision method". As a result of optimum design of 2-main steel girder birdge with 5${\times}$(1@50m), design methodology suggested in this study was demonstrated more economic and efficient than existing design and LCC optimization not considering bridge-rail longitudinal interaction and bridge-vehicle interaction.

Learning-based Super-resolution for Text Images (글자 영상을 위한 학습기반 초고해상도 기법)

  • Heo, Bo-Young;Song, Byung Cheol
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.4
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    • pp.175-183
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    • 2015
  • The proposed algorithm consists of two stages: the learning and synthesis stages. At the learning stage, we first collect various high-resolution (HR)-low-resolution (LR) text image pairs, and quantize the LR images, and extract HR-LR block pairs. Based on quantized LR blocks, the LR-HR block pairs are clustered into a pre-determined number of classes. For each class, an optimal 2D-FIR filter is computed, and it is stored into a dictionary with the corresponding LR block for indexing. At the synthesis stage, each quantized LR block in an input LR image is compared with every LR block in the dictionary, and the FIR filter of the best-matched LR block is selected. Finally, a HR block is synthesized with the chosen filter, and a final HR image is produced. Also, in order to cope with noisy environment, we generate multiple dictionaries according to noise level at the learning stage. So, the dictionary corresponding to the noise level of the input image is chosen, and a final HR image is produced using the selected dictionary. Experimental results show that the proposed algorithm outperforms the previous works for noisy images as well as noise-free images.

A hybrid algorithm for the synthesis of computer-generated holograms

  • Nguyen The Anh;An Jun Won;Choe Jae Gwang;Kim Nam
    • Proceedings of the Optical Society of Korea Conference
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    • 2003.07a
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    • pp.60-61
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    • 2003
  • A new approach to reduce the computation time of genetic algorithm (GA) for making binary phase holograms is described. Synthesized holograms having diffraction efficiency of 75.8% and uniformity of 5.8% are proven in computer simulation and experimentally demonstrated. Recently, computer-generated holograms (CGHs) having high diffraction efficiency and flexibility of design have been widely developed in many applications such as optical information processing, optical computing, optical interconnection, etc. Among proposed optimization methods, GA has become popular due to its capability of reaching nearly global. However, there exits a drawback to consider when we use the genetic algorithm. It is the large amount of computation time to construct desired holograms. One of the major reasons that the GA' s operation may be time intensive results from the expense of computing the cost function that must Fourier transform the parameters encoded on the hologram into the fitness value. In trying to remedy this drawback, Artificial Neural Network (ANN) has been put forward, allowing CGHs to be created easily and quickly (1), but the quality of reconstructed images is not high enough to use in applications of high preciseness. For that, we are in attempt to find a new approach of combiningthe good properties and performance of both the GA and ANN to make CGHs of high diffraction efficiency in a short time. The optimization of CGH using the genetic algorithm is merely a process of iteration, including selection, crossover, and mutation operators [2]. It is worth noting that the evaluation of the cost function with the aim of selecting better holograms plays an important role in the implementation of the GA. However, this evaluation process wastes much time for Fourier transforming the encoded parameters on the hologram into the value to be solved. Depending on the speed of computer, this process can even last up to ten minutes. It will be more effective if instead of merely generating random holograms in the initial process, a set of approximately desired holograms is employed. By doing so, the initial population will contain less trial holograms equivalent to the reduction of the computation time of GA's. Accordingly, a hybrid algorithm that utilizes a trained neural network to initiate the GA's procedure is proposed. Consequently, the initial population contains less random holograms and is compensated by approximately desired holograms. Figure 1 is the flowchart of the hybrid algorithm in comparison with the classical GA. The procedure of synthesizing a hologram on computer is divided into two steps. First the simulation of holograms based on ANN method [1] to acquire approximately desired holograms is carried. With a teaching data set of 9 characters obtained from the classical GA, the number of layer is 3, the number of hidden node is 100, learning rate is 0.3, and momentum is 0.5, the artificial neural network trained enables us to attain the approximately desired holograms, which are fairly good agreement with what we suggested in the theory. The second step, effect of several parameters on the operation of the hybrid algorithm is investigated. In principle, the operation of the hybrid algorithm and GA are the same except the modification of the initial step. Hence, the verified results in Ref [2] of the parameters such as the probability of crossover and mutation, the tournament size, and the crossover block size are remained unchanged, beside of the reduced population size. The reconstructed image of 76.4% diffraction efficiency and 5.4% uniformity is achieved when the population size is 30, the iteration number is 2000, the probability of crossover is 0.75, and the probability of mutation is 0.001. A comparison between the hybrid algorithm and GA in term of diffraction efficiency and computation time is also evaluated as shown in Fig. 2. With a 66.7% reduction in computation time and a 2% increase in diffraction efficiency compared to the GA method, the hybrid algorithm demonstrates its efficient performance. In the optical experiment, the phase holograms were displayed on a programmable phase modulator (model XGA). Figures 3 are pictures of diffracted patterns of the letter "0" from the holograms generated using the hybrid algorithm. Diffraction efficiency of 75.8% and uniformity of 5.8% are measured. We see that the simulation and experiment results are fairly good agreement with each other. In this paper, Genetic Algorithm and Neural Network have been successfully combined in designing CGHs. This method gives a significant reduction in computation time compared to the GA method while still allowing holograms of high diffraction efficiency and uniformity to be achieved. This work was supported by No.mOl-2001-000-00324-0 (2002)) from the Korea Science & Engineering Foundation.

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Automatic Interface Synthesis based on IP Categorization and Characteristics Matching (IP 범주화와 특성 대응을 통한 인터페이스 회로 자동 합성)

  • Yun, Chang-Ryul;Jhang, Kyoung-Son
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.34-44
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    • 2006
  • A system-on-a-chip (SoC) design uses pre-verified IP hardware blocks in order to reduce design time. We need interface circuits to connect IPs with different protocols. In SoC design we should design interface circuits frequently and these tasks are somewhat time-consuming and error-prone. So it is necessary to generate the interface circuits automatically. Several studies have been made on generating interface circuits only from the communication protocols of IPs. With existing approaches, it is not easy to generate interface circuits connecting two IPs only from communication protocols: connection between IP with address and W without address, connection between IP with only one port to transfer address/data and IP with different ports for address and data connection between IP that transfer address and data together and IP that transfer only one address with a number of data in a burst. No consideration of various characteristics of IPs and no changed algorithm are responsible for it. In order to solve this problem, the proposed approach categorizes communication protocols of IPs, and takes characteristics matching of IPs into account during the interface synthesis. In experiments, we show that we could correctly generate and verify interface circuits for IPs with different characteristics.

Exploration of Optimal Multi-Core Processor Architecture for Physical Modeling of Plucked-String Instruments (현악기의 물리적 모델링을 위한 최적의 멀티코어 프로세서 아키텍처 탐색)

  • Kang, Myeong-Su;Choi, Ji-Won;Kim, Yong-Min;Kim, Jong-Myon
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.5
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    • pp.281-294
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    • 2011
  • Physics-based sound synthesis usually requires high computational costs and this results in a restriction of its use in real-time applications. This motivates us to implement the sound synthesis algorithm of plucked-string instruments using multi-core processor architectures and determine the optimal processing element (PE) configuration for the target instruments. To determine the optimal PE configuration, we evaluate the impacts of a sample-per-processing element (SPE) ratio that is defined as the amount of sample data directly mapped to each PE on system performance and both area and energy efficiencies using architectural and workload simulations. For the acoustic guitar, the highest area and energy efficiencies are achieved at a SPE ratio of 5,513 and 2,756, respectively, for the synthesis of musical sounds sampled at 44.1 kHz. In the case of the classical guitar, the maximum area and energy efficiencies are achieved at a SPE ratio of 22,050 and 5,513, respectively. In addition, the synthetic sounds were very similar to original sounds in their spectra. Furthermore, we conducted MUSHRA subjective listening test with ten subjects including nine graduate students and one professor from the University of Ulsan, and the evaluation of the synthetic sounds was excellent.