• Journal of Institute of Control, Robotics and Systems
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• v.4 no.6
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• pp.729-737
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• 1998

In this paper, using $\mu$ synthesis algorithm with structured uncertainty, we design controller and apply it for the Two-Inertia resonance(TMS: Two Mass Spring) system. The TMS system is one of the simplest models which generate a torsional vibration. In this system, it is required to design a controller achieving the control performance while suppressing the torsional vibration. Furthermore, when vibration frequency for the system is varying by reason of parameter variations, we should consider parameter variations in controller design. Then, we design two other controller schemes of the PI controller and the standard $H_{\infty}$ controller and compare these controllers with the controller designed by the $\mu$ synthesis robust control method by using simulations and experiments.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.116-124
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• 1994

This paper describes the design of a high-level synthesis system. ISyn: Interface Synthesis System for ISPS-A. which generates hardware satisfying timing constraints. The original version of ISPS is extended to be used for the description/capture of interface operations and timing constraints in the ISPS-A. To generate the schedule satisfying interface constraints the scheduling process is divided into two steps:pre-scheduling and post-scheduling. ISyn allocates hardware modules with I/O ports by the clique partitioning algorithm. Experimental results show that ISyn is capable of synthesizing hardware modules effectively for internal and/or interactive operations.

• International Journal of Control, Automation, and Systems
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• v.6 no.2
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• pp.171-179
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• 2008

This paper addresses the synthesis of an iterative learning controller for a class of linear systems with norm-bounded parameter uncertainties. We take into account an iterative learning algorithm with current cycle feedback in order to achieve both robust convergence and robust stability. The synthesis problem of the developed iterative learning control (ILC) system is reformulated as the ${\gamma}$-suboptimal $H_{\infty}$ control problem via the linear fractional transformation (LFT). A sufficient convergence condition of the ILC system is presented in terms of linear matrix inequalities (LMIs). Furthermore, the ILC system with fast convergence rate is constructed using a convex optimization technique with LMI constraints. The simulation results demonstrate the effectiveness of the proposed method.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.8
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• pp.87-98
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• 1994

Object-oriented analysis-synthesis coding subdivides each image of a sequence into moving objects and compensates the motion of each object. Thus it can reconstruct real motion better than conventional motion-compensated coding techniques at very-low-bit-rates. It uses a mapping parameter technique for estimating motion information of each object. Since a mapping parameter technique uses gradient operators it is sensitive to redundant details and noise. To accurately determine mapping parameters, we propose a new analysis method using integral projections for estimation of gradient values. Also to reconstruct correctly the local motion the proposed algorithm divides an image into segmented objects each of which having uniform motion information while the conventional one assumes a large object having the same motion information. Computer simulation results with several test sequences show that the proposed image analysis method in object-oriented analysis-synthesis coding shows better performance than the conventional one.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.2
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• pp.83-87
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• 2011

Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. Almost systems require that the clock length is required prior to scheduling, the best value of the clock can be found only after evaluating different schedules. In this study, we presents a scheduling method that works simultaneously with synthesis by selecting a clock from a chainable operation set. Our scheduling algorithm is based on list scheduling and executes chaining considering bit level delays based on selected clock period. Experimental results show that our method improves the performance by 18 percent.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.6
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• pp.49-57
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• 1993

In the paper, we describe the design of a pipelined datapath synthesis system for DSP applications. Taking SFG (Signal Flow Graph) in schematic as inputs, the system generates pipelined datapaths automatically through scheduling and module allocation processes. For efficient hardware synthesis, scheduling and module allocation algorithms are proposed. The proposed scheduling algorithm is of iterative/constructive nature, where the measure of equi-distribution of operations to partitions is adopted as the objective function. Module allocation is performed to reduce the interconnection cost from the initial allocation. In the experiment, we compare the results with those of other systems and show the effectiveness of the proposed algorithms.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.1-10
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• 1997

By considering low power design at higher levels of abstraction rather than at lower levels of abstraction, we can apply various transformation techniques to a system design with wider view and obtain much more effective power reduction with less cost and effort. In this paper, a transformation technique, called power - conscious loop folding is proposed for high level synthesis of a low power system.Our work is focused on reducing the power consumed by functional units in adata path dominated circuit through the decrease of switching activity. Te transformation algorithm has been implemented and integrated into HYPER, a high level synthesis system for experiments. In our experiments, we could achieve a pwoer reduction of up to 50% for data path dominated circuits.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.1321-1325
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• 1993

This paper investigates the use of Fuzzy vector quantizer(FVQ) in speech synthesis. To compress speech data, we employ K-means algorithm to design codebook and then FVQ technique is used to analysize input speech vectors based on the codebook in an analysis part. In FVQ synthesis part, analysis data vectors generated in FVQ analysis is used to synthesize the speech. We have fined that synthesized speech quality depends on Fuzziness values in FVQ, and the optimum fuzziness values maximized synthesized speech SQNR are related with variance values of input speech vectors. This approach is tested on a sentence, and we compare synthesized speech by a convensional VQ with synthesized speech by a FVQ with optimum Fuzziness values.

• Journal of Korea Multimedia Society
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• v.11 no.6
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• pp.729-736
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• 2008

Using video synthesis to depict flowing water is useful in virtual reality, computer games, digital movies and scientific computing. This paper presents a novel algorithm for synthesizing dynamic water scenes through a sample video based on a dynamic texture model. In the paper, we treat the video sample as a 2-D texture image. In order to obtain textons, we analyze the video sample automatically based on dynamic texture model. Then, we utilize a linear dynamic system (LDS) to describe the characteristics of each texton. Using these textons, we synthesize a new video for dynamic flowing water which is prolonged and non-fuzzy in vision. Compared with other classical methods, our method was tested to demonstrate the effectiveness and efficiency with several video samples.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.509-513
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• 2004

An area of research called evolvable hardware (EHW) has recently emerged which combines aspects of evolutionary computation with hardware design and synthesis. The features that can be used to identify and classify evolvable hardware are the evolutionary algorithm, the implementation and the genotype representation. This paper gives an introduction to the field. It continues by including classifying the EHW and the applications of the area.