• Title/Summary/Keyword: switch cell

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An ABR Service Control for Improving Efficiency of PNNI (사설망인터페이스(PNNI)의 효율성 향상을 위한 ABR 서비스 제어)

  • Kim Byun-Gon
    • Science of Emotion and Sensibility
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    • v.7 no.4
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    • pp.67-75
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    • 2004
  • In this paper, we analyze previous flow control algorithm for serving ABR traffic, and then propose the algorithm which calculate fair transmission rate and control efficiently ABR traffic using VS/VD switch which has an effect on PNNI environment with long delay. For getting the transmission rate, the proposed algorithm use FMMRA as ER scheme which calculate exactly the fair share. And, in large delay state, we can obtain fair cell sharing by calculating transmission rates which obtained by transmitted queue length information of VD to VS for serve and drain cell in queue Through the computer simulation, we evaluate the performance of proposed algorithm, According to the results, the proposed algorithm shows good performance.

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Relation between Resistance and Capacitance in Atomically Dispersed Pt-SiO2 Thin Films for Multilevel Resistance Switching Memory (Pt 나노입자가 분산된 SiO2 박막의 저항-정전용량 관계)

  • Choi, Byung Joon
    • Korean Journal of Materials Research
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    • v.25 no.9
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    • pp.429-434
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    • 2015
  • Resistance switching memory cells were fabricated using atomically dispersed Pt-$SiO_2$ thin film prepared via RF co-sputtering. The memory cell can switch between a low-resistance-state and a high-resistance-state reversibly and reproducibly through applying alternate voltage polarities. Percolated conducting paths are the origin of the low-resistance-state, while trapping electrons in the negative U-center in the Pt-$SiO_2$ interface cause the high-resistance-state. Intermediate resistance-states are obtained through controlling the compliance current, which can be applied to multi-level operation for high memory density. It is found that the resistance value is related to the capacitance of the memory cell: a 265-fold increase in resistance induces a 2.68-fold increase in capacitance. The exponential growth model of the conducting paths can explain the quantitative relationship of resistance-capacitance. The model states that the conducting path generated in the early stage requires a larger area than that generated in the last stage, which results in a larger decrease in the capacitance.

A Study About Design and Characteristic Improvement According to P-base Concentration Charge of 500 V Planar Power MOSFET (500 V 급 Planar Power MOSFET의 P 베이스 농도 변화에 따른 설계 및 특성 향상에 관한 연구)

  • Kim, Gwon Je;Kang, Ye Hwan;Kwon, Young-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.4
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    • pp.284-288
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    • 2013
  • Power MOSFETs(Metal Oxide Semiconductor Field Effect Transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. We have experimental results and explanations on the doping profile dependence of the electrical behavior of the vertical MOSFET. The device is fabricated as $8.25{\mu}m$ cell pitch and $4.25{\mu}m$ gate width. The performances of device with various p base doping concentration are compared at Vth from 1.77 V to 4.13 V. Also the effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for various applications can be further optimized at power device.

irrE, an Exogenous Gene from Deinococcus radiodurans, Improves the Growth of and Ethanol Production by a Zymomonas mobilis Strain Under Ethanol and Acid Stresses

  • Zhang, Ying;Ma, Ruiqiang;Zhao, Zhonglin;Zhou, Zhengfu;Lu, Wei;Zhang, Wei;Chen, Ming
    • Journal of Microbiology and Biotechnology
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    • v.20 no.7
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    • pp.1156-1162
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    • 2010
  • During ethanol fermentation, bacterial strains may encounter various stresses, such as ethanol and acid shock, which adversely affect cell viability and the production of ethanol. Therefore, ethanologenic strains that tolerate abiotic stresses are highly desirable. Bacteria of the genus Deinococcus are extremely resistant to ionizing radiation, ultraviolet light, and desiccation, and therefore constitute an important pool of extreme resistance genes. The irrE gene encodes a general switch responsible for the extreme radioresistance of D. radiodurans. Here, we present evidence that IrrE, acting as a global regulator, confers high stress tolerance to a Zymomonas mobilis strain. Expression of the gene protected Z. mobilis cells against ethanol, acid, osmotic, and thermal shocks. It also markedly improved cell viability, the expression levels and enzyme activities of pyruvate decarboxylase and alcohol dehydrogenase, and the production of ethanol under both ethanol and acid stresses. These data suggest that irrE is a potentially promising gene for improving the abiotic stress tolerance of ethanologenic bacterial strains.

Analysis, Design, and Implementation of a Zero-Voltage-Transition Interleaved Boost Converter

  • Ting, Naim Suleyman;Sahin, Yakup;Aksoy, Ismail
    • Journal of Power Electronics
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    • v.17 no.1
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    • pp.41-55
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    • 2017
  • This study proposes a novel zero voltage transition (ZVT) pulse width modulation (PWM) DC-DC interleaved boost converter with an active snubber cell. All the semiconductor devices in the converter turn on and off with soft switching to reduce the switching power losses and improve the overall efficiency. Through the interleaved approach, the current stresses of the main devices and the ripple of the output voltage and input current are reduced. The main switches turn on with ZVT and turn off with zero voltage switching (ZVS). The auxiliary switch turns on with zero current switching (ZCS) and turns off with ZVS. In addition, the snubber cell does not create additional current or voltage stress on the main switches and main diodes. The proposed converter can smoothly achieve soft switching characteristics even under light load conditions. The theoretical analysis and operating stages of the proposed converter are made for the D > 50% and D < 50% modes. Finally, a prototype of the proposed converter is implemented, and the experimental results are given in detail for 500 W and 50 kHz. The overall efficiency of the proposed converter reached 95.5% at nominal output power.

A study on strategical statistical multiplexing of VBR MPEG bit streams and QoS based multiplexing gains (가변비트율 MPEG-2 비트열의 합성과 QoS를 고려한 다중화 이득에 관한 연구)

  • 장승기;서덕영;경문현;박섭형;정재일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.11
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    • pp.2836-2849
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    • 1996
  • Over ATM network, variable bit rate(or VBR) traffic is allowed. Control of VBR traffic is allowed. Control of VBR traffic becomes difficult if it is bursty. VBR video traffic becomes so much bursty during intra frame period that much cell loss would occur when satistical multiplexed in ATM swich. To aviod cellloss, extra communication resources should be allocated, which reduces the capability of an ATM channel. In this paper, we propose two methods which enable a channel limited in resources to serve more VBR MPEG video bit streams. Firstly, we could redue the bitrate fluction of a statiscally multiplexed bundle of VBR video bit streams by reducing the number of intra frames overlapped at the same frame period. This method can be used in ATM switch which controls multiple video sources. Secondary, in two layer enoding, statistical multiplexing gains can be icreased by letting peak bit rate durations of both layers not be overlapped. This results in more smooth traffic. The performance of proposed methods are demonstrated by a proposed calculation method of statistical multiplexing gains(or SMGs.) The proposed SMG is based on both delay and cell loss QoS requirements at the same time.

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A study on the architecture and logic block design of FPGA (FPGA 구조 및 로직 블록의 설계에 관한 연구)

  • 윤여환;문중석;문병모;안성근;정덕균
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.11
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    • pp.140-151
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    • 1996
  • In this study, we designed the routing structure and logic block of a SRAM cell-based FPGA with symmetrical-array architecture. The designed routing structure is composed of switch matrices, routing channels and I/O blocks, and the routing channels can be subdivided into single length channels, double length channels and global length channels. The interconnection between wires is made through SRAM cell-controlled pass transistors. To reduce the signal delay in pass transistors, we proposed a scheme raising the gate-control voltage to 7V. The designed SRAM cells have built-in shift register capability, so there is no need for separate shift registers. We designed SRAM cells in the LUTs(look-up tables) to enable the wirte operations to be performed synchronously with the clock for ease of system application. Each logic block (LFU) has four 4-input LUTs, flip-flops and other gates, and the LUTs can be used a sSRAM memory. The LFU also has a dedicated carry logic, so a 4-bit adder can be implemented in one LFU. We designed our FPGA using 0.6.mu.m CMOS technology, and simulation shows proper operation of a 4 bit counter at 100MHz.

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A Study on Efficient Transmission Rate Control of ABR Traffic in PNNI Networks (PNNI 망에서 효율적인 ABR 트래픽 전송률 제어에 관한 연구)

  • Kim Byun-gon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.5
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    • pp.973-980
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    • 2005
  • In this paper, we analyze previous flow control algorithm for serving ABR traffic, and then propose the algorithm which calculate fair transmission rate and control efficiently ABR traffic using VS/VD switch which has an effect on PNNI environment with long delay. For getting the transmission rate, the proposed algorithm use FMMRA as ER scheme which calculate exactly the fair share. And, in large delay state, we can obtain fair cell sharing by calculating transmission rates which obtained by transmitted queue length information of VD to VS for serve and drain cell in queue Through the computer simulation, we evaluate the performance of proposed algorithm. According to the results, the proposed algorithm shows good performance.

A Study on Policing Mechanism in ATM Network using Fuzzy Control (퍼지 제어를 이용한 ATM망에서 PM에 관한 연구)

  • 신관철;박세준;양태규
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.5
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    • pp.931-940
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    • 2001
  • In this paper, I propose Fuzzy Policing Mechanism(FPM) over ATM networks for the control of traffic which is unpredictable and bursty source. The FPM is consist of counter, subtracter and Fuzzy Logic Controller(FLC). The FLC is divided to fuzzifier, inference engine and defuzzifer The output of FLC inputs to the subtractor and it controls the counter. The counter works as a switch in transmission of cells. In simulation, I compared the FPM with the Leaky Bucket algorithm(LBM) in cell loss probability and performance characteristics. As a result, FPM gives lower cell loss probability than that of LBM and has good response behavior The FPM efficiently controls the transmission of packets which are variable traffic source and, it also has good selectivity.

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Analysis and Design of Interleaved Boost Power Factor Corrector on Two Stage AC/DC PFC Converter (2단 역률보상회로를 구성하는 Interleaved 승압형 컨버터의 해석 및 설계)

  • 허태원;손영대;김동완;김춘삼;박한석;우정인
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.7
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    • pp.343-351
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    • 2003
  • In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.