• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.939-942
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• 2016

One of the most important characteristic curves of a solar cell is its current density-voltage (J-V) curve under AM1.5G insolation. Solar cell can be considered as a semiconductor diode, so a diode equivalent model was used to estimate its parameters from the J-V curve by numerical simulation. Active layer plays an important role in operation of a solar cell. We investigated the effect thicknesses and defect densities (N_d) of the active layer on the J-V curve. When the active layer thickness was varied (for N_d = 8×10¹⁷ cm^-3) from 800 nm to 100 nm, the reverse saturation current density (J_o) changed from 3.56×10^-5 A/cm² to 9.62×10^-11 A/cm² and its ideality factor (n) changed from 5.28 to 2.02. For a reduced defect density (N_d = 4×10¹⁵ cm^-3), the n remained within 1.45≤n≤1.92 for the same thickness range. A small increase in shunt resistance and almost no change in series resistance were observed in these cells. The low reverse saturation current density (J_o = 9.62×10^-11 A/cm²) and diode ideality factor (n = 2.02 or 1.45) were observed for amorphous silicon based solar cell with 100 nm thick active layer.

• 대한금속재료학회지
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• 제48권3호
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• pp.256-261
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• 2010

In this work, high-k dielectric stacks of $HfO_2$ and $HfO_2$/$Al_2O_3$/$HfO_2$ (HAH) were deposited on $SiO_2/Si$ substrates by atomic layer deposition as charge trapping layers in charge trapping devices. The structural stability and the charge trapping characteristics of such stacks were investigated using Metal-Alumina-Hafnia-Oxide-Silicon (MAHOS) structure. The surface roughness of $HfO_2$ was stable up to 11 nm with the insertion of 0.2 nm thick $Al_2O_3$. The effect of the thickness of the HAH stack and the thickness of intermediate $Al_2O_3$ on charge trapping characteristics were investigated for MAHOS structure under various gate bias pulse with duration of 100 ms. The threshold voltage shift after programming and erase showed that the memory window was increased with increasing bias on gate. However, the programming window was independent of the thickness of HAH charge trapping layers. When the thickness of $Al_2O_3$insertion increased from 0.2 nm to 1 nm, the erase window was decreased without change in the programming window.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.68-68
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• 2011

As feature size is smaller, new technology are needed in semiconductor factory such as gap-fill technology for sub 100nm, development of ALD equipment for Cu barrier/seed, oxide trench etcher technology for 25 nm and beyond, development of high throughput Cu CMP equipment for 30nm and development of poly etcher for 25 nm and so on. We are focus on gap-fill technology for sub-30nm. There are many problems, which are leaning, over-hang, void, micro-pore, delaminate, thickness limitation, squeeze-in, squeeze-out and thinning phenomenon in sub-30 nm gap fill. New gap-fill processes, which are viscous oxide-SOD (spin on dielectric), O3-TEOS, NF3 Based HDP and Flowable oxide have been attempting to overcome these problems. Some groups investigated SOD process. Because gap-fill performance of SOD is best and process parameter is simple. Nevertheless these advantages, SOD processes have some problems. First, material cost is high. Second, density of SOD is too low. Therefore annealing and curing process certainly necessary to get hard density film. On the other hand, film density by Flowable oxide process is higher than film density by SOD process. Therefore, we are focus on Flowable oxide. In this work, dielectric film were deposited by PECVD with TSA(Trisilylamine - N(SiH3)3) and NH3. To get flow-ability, the effect of plasma treatment was investigated as function of O2 plasma power. QMS (quadruple mass spectrometry) and FTIR was used to analysis mechanism. Gap-filling performance and flow ability was confirmed by various patterns.

• 전기학회논문지
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• 제64권9호
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• pp.1323-1329
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• 2015

The WO₃/Ag/WO₃ transparent thin films are fabricated by the RF magnetron sputtering. This has a transmittance of front and rear about 90% in the visible light range and surface resistance of 6.41Ω/□. In this paper, we analyzed the surface characteristics caused by the working pressure and O₂ plasma surface treatment to apply a transparent electrode that was prepared to the laminated structure with other materials. The working pressure was changed in the WO₃ film to 10mTorr, 7mTorr, and 5mTorr, it showed a lower than roughness of conventional ITO. In addition, by 55.5774 J/m² at 5mTorr, it shows the hydrophobic property with lower process pressure. O₂ plasma surface treatment was changed at the condisions of the RF power to 150W, 100W, and 50W and the process time to 240s, 180s, 120s, and 60s. The surface roughness are the maximum roughness(Rmax) 6.437nm and the average roughness(Rq) 0.827nm at RF power 150W, and the maximum roughness (Rmax) 6.880nm and the average roughness (Rq) 0.839nm at process time 240sec. It showed a lower value than the surface treatment. also about working pressure and process time is increased, it showed the hydrophobic.

• 열처리공학회지
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• 제28권6호
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• pp.291-295
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• 2015

IGZO single layer and $IGZO/TiO_2$ bi-layered films were deposited on glass substrate at room temperature with radio frequency magnetron sputtering to investigate the effect of $TiO_2$ buffer layer on the electrical and optical properties of the films. For all deposition, the thickness of IGZO and $TiO_2$ Buffer layer was kept at 100 and 5 nm, respectively. In a comparison of figure of merit, IGZO films with a 5-nm-thick $TiO_2$ buffer layer show the higher figure of merit ($8.40{\times}10^{-5}{\Omega}^{-1}$) than that of the IGZO single layer films ($6.23{\times}10^{-5}{\Omega}^{-1}$) due to the enhanced optical transmittance and the decreased sheet resistance of the films. The observed results mean that a 5 nm thick $TiO_2$ buffer layer in the $IGZO/TiO_2$ films results in better electrical and optical performance than conventional IGZO single layer films.

• 한국재료학회지
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• 제33권9호
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• pp.360-366
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• 2023

This study focuses on how the partial substitution of copper by nickel nanoparticles affects the electrical and structural properties of the Bi₂Ba₂Ca₂Cu_2.9Ni_0.1O_10+δ, Bi₂Ba₂Ca₂Cu_2.8Ni_0.2O_10+δ and Bi₂Ba₂Ca₂Cu_2.6Ni_0.4O_10+δ compounds. Approximate values of crystallization size and crystallization percentage for the three compounds were calculated using the Scherer, modified Scherer, and Williamson-Hall methods. A great similarity was observed in the crystal size values from the Scherer method, 243.442 nm, and the Williamson-Hall method, 243.794 nm for the second sample. At the same time this sample exhibited the highest crystal size value for the three methods. In the examination of electrical properties, the sample with 0.1 partial substitution, Bi₂Ba₂Ca₂Cu_2.9Ni_0.1O_10+δ was determined to be the best with a critical temperature of 100 K and an energy gap of 6.57639 × 10^-21 MeV. Using the SEM technique to analyze the structural morphology of the three phases, it was discovered that the size of the granular forms exceeds 25 nm. It was determined that the samples' shapes alter when nickel concentration rises. The patterns that reveal the distribution of the crystal structure also exhibit clear homogeneity.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1168-1170
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• 2005

Nanoimprint Lithography(NIL) has increasingly been recognized as a key manufacturing technology for nanosized feature. One of the most important task for nanoimprint lithography is to provide the imprinting stamp with low price. The Stamp fabricated with Si based material by e-beam lithography, RIE is extremely expensive and its throughput is very limited and PDMS replica is too soft to hold high imprinting pressure.(>5atm) In this study, we present the imprinting stamp which can be easily replicated from original mold and is based on PVC film. Replication of original Si mold to PVC film was done by Hot embossing technique, ($120^{\circ}C$ of Temperature, 20 atm applied) As small as 100nm patterns were successfully transferred into PVC film. The size of stamp was up to 100mm in diameter.

• International Journal of Oral Biology
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• 제46권3호
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• pp.105-110
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• 2021

The physicochemical properties of crystalline titanium dioxide nanoparticles (TiO₂ NPs) were investigated by comparing amorphous (amTiO₂), anatase (aTiO₂), metaphase of anatase-rutile (arTiO₂), and rutile (rTiO₂) NPs, which were prepared at various calcination temperatures (100℃, 400℃, 600℃, and 900℃). X-ray diffraction (XRD) and scanning electron microscopy (SEM) analyses confirmed that the phase-transformed TiO₂ had the characteristic features of crystallinity and average size. The surface chemical properties of the crystalline phases were different in the spectral analysis. As anatase transformed to the rutile phase, the band of the hydroxyl group at 3,600-3,100 cm^-1 decreased gradually, as assessed using Fourier transform infrared spectroscopy (FT-IR). For ultraviolet-visible (UV-Vis) spectra, the maximum absorbance of anatase TiO₂ NPs at 309 nm was blue-shifted to 290 nm at the rutile phase with reduced absorbance. Under the electric field of capillary electrophoresis (CE), TiO₂ NPs in anatase migrated and detected as a broaden peak, whereas the rutile NPs did not. In addition, anatase showed the highest photocatalytic activity in an UV-irradiated dye degradation assay in the following order: aTiO₂ > arTiO₂ > rTiO₂. Overall, the phases of TiO₂ NPs showed characteristic physicochemical properties regarding size, surface chemical properties, UV absorbance, CE migration, and photocatalytic activity.

• 한국세라믹학회지
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• 제41권7호
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• pp.528-533
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• 2004

입자크기가 20∼700nm인 구형 실리카입자의 자연침강 혹은 원심분리법으로 제조한 주형체에 탄화규소 전구체 polymethyl-silane (PMS) 혹은 polycarbosilane (PCS) 고분자 용액을 함침한다음, 가교 및 1000∼140$0^{\circ}C$ 열분해하고 마지막으로 불산 (HF)으로 실리카를 식각하여 84∼658nm 기공이 3차원으로 정렬된 메크로다공성(macroporous) 탄화규소 세라믹과 불규칙적인 15∼65nm 기공을 가진 메조다공성(mesoporous) 탄화규소 세라믹을 제조하였다. 전자는 112nm 실리카 입자 주형체를 사용하여 140$0^{\circ}C$로 처리했을 때, 표면적 584.64$m^2$g$^{-1}$을 나타낸 반면, 후자는 20-30nm 실리카 주형체를 사용하여 100$0^{\circ}C$로 처리하였을때, 최대의 표면적 619.4$m^2$g$^{-1}$를 나타내었다, 이와 같이 사용된 실리카 입자, 고분자 전구체, 그리고 열처리 조건에 따른 기공특성을 SEM. TEM 및 BET으로 분석 설명하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.224-226
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• 2004

CMP process requirements become tighter especially in sub-100nm technology. Especially, high planarity and low defectivity appear as leading issues in CMP technology. Also, the introduction of new materials and advanced lithography technique increases CMP applications. Here are listed some major issues and challenges in CMP technology, which can be categorized following four items. These have practical significance and should be considered more concretely for future generation.