• Journal of IKEEE
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• v.21 no.2
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• pp.105-114
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• 2017

This paper proposes a design method of an LCL-filter for grid-tied three-level inverter systems. The demand for three-phase PWM inverters in applications such as wind or solar power generation systems has been increase in recent years. To reduce harmonic components caused by switching operation, such inverters are connected to the grid via an LCL filter. Although there are research results for designing LCL-filter, the modulation method should be fully considered to make the filter perform desired cancellation ability with minimized size. This paper presents the design methodology for an LCL-filter that is optimized for SVM switching operations. The simulation and experimental results verify the validity of the LCL-filter designed with proposed method in this paper.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.33-37
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• 1998

For the high power variable speed applications, the DCTLI(diode clamped three-level inverter) have been widely used. This paper describes the analysis of the neutral point current of the DCTLI and the improved space vector-based PWM strategy considering the switching frequency of power devices, that minimizes the fluctuation of the neutral point current in spite of high modulation index region and low power factor. It contributes to decrease the capacitance of dc-link capacitor bank and to increase the neutral point voltage controllable region. Especially, even if second (or even) order harmonic is induced in load current (at this situation, is was investigated that the general control method can not suppress the neutral point voltage variation), this PWM can provide effective control method to suppress the neutral point voltage variation. Various simulation results by means of Matlab/Simulation are presented to verify the proposed PWM.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.441-443
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• 2007

In this paper, The authors design the current controller which independently control the d, q axis current transformed by the synchronously rotating d, q axis and a Space Vector Pulse Width Modulation(SVPWM) to steadily control the output DC-Link voltage against the variable load of the three phase PWM converter. Also, This study improves the high power factor, stability, and rapid response by the phase angle control using the digital Phase Locked Loop(PLL).

• Journal of Power Electronics
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• v.19 no.2
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• pp.560-568
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• 2019

This paper studies the inherent relationship between currents and zero-sequence components. Then a precise algorithm is proposed to calculate the injected zero-sequence component to control the DC-Link neutral-point voltage balance, which can result in a more efficient and flexible neutral point voltage balance with a desirable performance. In addition, it is shown that carried-based PWM with the calculated zero-sequence component scheme can be equivalent to space-vector pulse-width modulation (SVPWM). Based on the proposed method, the optimal zero-sequence component of the feasible modulation indices is analyzed. In addition, the unbalanced load limitation of the DC-Link neutral-point voltage balance control is also revealed. Simulation and experimental results are shown to verify the validity and practicality of the proposed algorithm.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.138-145
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• 2015

In this paper, a novel static overmodulation scheme (OVM) for space-vector PWM (SVPWM) is proposed. The proposed static OVM scheme uses the concept of adding offset voltages in linear region as well as overmodulation region to fully utilize DC-link voltage. By employing zero sequence voltage injection, the proposed scheme reduces procedures for achieving SVPWM such as complicated gating time calculation. In addition, this paper proposes a stepwise discontinuous angle movement in high modulation region in order to reduce Total Harmonic Distortion (THD). The validity of the proposed scheme is verified through theoretical analysis and experimental results.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.189-190
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• 2018

본 논문에서는 유도전동기의 토크 리플 및 스위칭 손실 저감을 위해 전압변조기법인 공간벡터변조(Space Vector Pulse Width Modulation, SVPWM) 기법과 불연속전압변조(Discontinuous Pulse Width Modulation, DPWM) 기법을 혼합하여 사용하는 새로운 변조기법을 제안한다. 제안하는 방식은 지령전압이 최대인 부근에서 SVPWM 기법을 사용하며, 나머지 구간에서는 DPWM 기법을 적용한다. 전 구간 단일기법을 적용할 때와 비교하여 제안하는 방식은 토크 리플 및 스위칭 손실을 효율적으로 저감시킬 수 있으며 시뮬레이션을 통해 타당성을 검증한다.

• Journal of Electrical Engineering and Technology
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• v.12 no.2
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• pp.738-750
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• 2017

In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.729-732
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• 2001

Digital signal processors(DSP) are widely used in modern power conversion devices, ac motor drives. However, generating pulse-width modulation(PWM) gating signals requires so high sampling rates that most computation resources of the DSP must be devoted to generating them. This paper presents an ASIC realization of 2 channel space-vector PWM(SVPWM). The developed DSP(ECLDSP) board can transmit gating signals to 2 converter/inverter and control them. ECLDSP board is used for control the various kinds of power-quality improvement systems.

• Journal of Power Electronics
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• v.15 no.1
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• pp.116-122
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• 2015

This paper presents a new current sharing control strategy for parallel-connected, synchronised three-phase DC-AC converters employing space vector pulse width modulation (SVPWM) without current sharing reactors. Unlike conventional control methods, the proposed method breaks the paths of the circulating current by dividing the switching cycle evenly between parallel connected equally rated converters. Accordingly, any inter-module reactors or circulating current control will be redundant, leading to reductions in system costs, size, and control algorithm complexity. Each converter in the new scheme employs a synchronous dq current regulator that uses only local information to attain a desired converter current. A stability analysis of the current controller is included together with a simulation of the converter and load current waveforms. Experimental results from a 2.5kVA test rig are included to verify the proposed control method.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.265-268
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• 2004

교류 전동기의 전류 제어 특성은 전동기의 재정 수의 특성, 전류 제어기의 구성 및 제어 주기, PWM기법 및 주파수에 의해 달라지며, 시스템의 동적 특성 및 효율에도 큰 영향을 미친다. 본 논문은 PMSM(Permanent magnet synchronous motor)의 동기좌표계에서 벡터 제어 시 전류 제어 특성을 분석할 수 있는 실제와 동일한 디지털 전류 제어기 및 SVPWM(Space Vector PW)을 포함한 시뮬레이터를 구현하였으며 고속 및 일반 PMSM을 대상으로 시뮬레이션을 수행하여 그 결과 전류 제어 특성의 예측 가능함을 보였다.