• Journal of Power Electronics
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• v.8 no.2
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• pp.131-140
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• 2008

This paper presents a new control approach of DSTATCOM (distribution static compensator) for compensation of reactive power, unbalanced loading and harmonic currents under unbalanced non-sinusoidal ac mains. The control of DSTATCOM is achieved using Adaline based current estimator based on LMS algorithm to maintain source currents real and undistorted. The dc bus voltage of voltage source converter (VSC) working as DSTATCOM is maintained at constant voltage using a proportional-integral (PI) controller. The DSTATCOM system alongwith proposed control scheme is modeled in MATLAB to simulate the behavior of the system. The practical implementation of the DSTATCOM is carried out using dSPACE DS1104 R&D controller having TMS320F240 as a slave DSP. Simulated and implementation results are presented to demonstrate the effectiveness of the DSTATCOM with Adaline based control to meet the severe load perturbations with different types of loads (linear and non-linear) under distorted and unbalanced AC mains.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.446-448
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• 1995

This paper dscribes a detail simulation model with EMTP (Electro-Magnetic Transients Program) which is very effective to analyze the interaction between the ac transmission line and STATCON (static condenser). The SATCON was represented by two voltage-source converters connected in parallel and sharing an energy storage dc capacitor bank. The voltage source converters was modeled with ideal gate turn-off switches. The power system was represented by a detail generator model and a distributed tramnsmission line model for detail performance analyses. Analysis results show that the conceived simulation model is very effective to analyze the interaction between the ac transmission line and STATCON, and to evaluate the performance of STATCON.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.403-406
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• 1995

In general, the reactive power is controlled by amplitude of the output voltage. This paper propose that the multiple voltage source inverter have controllable power factor made by load vary at receive-stage as lagging and leakage control.

• Proceedings of the KAIS Fall Conference
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• 2001.11a
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• pp.99-103
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• 2001

Though the research and the development in the field of machine tool was focused on high precision and high speed machine these days, traditional gear reduction device has been used to increase the cutting force which was transmitted from power source, motor In this study, analysis of 2 step gear reducer used in machining center spindle was carried out by using APM WinMachine which is commercial software for the analysis of machine element and system. For the analysis of this device, first of all, the analysis of power source and the transmitting of it were carried out. Then, machine elements like gear, shaft, bearing, and the forth, was analyzed in the view point of life time, static strength, stiffness, fatigue failure, etc. Consequently, we can estimate them and introduce new idea of the design modification of reduction device by this study.

• Journal of Internet Computing and Services
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• v.17 no.4
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• pp.51-60
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• 2016

Embedded software has requirements such as real-time and environment independency. The real-time requirement is affected from worst-case execution time of loaded tasks. Therefore, to guarantee real-time requirement, we need to determine a program's worst-case execution time using static analysis approach. However, the existing methods for worst-case execution time analysis do not consider the environment independency. Thus, in this paper, in order to provide environment independency, we propose a method for measuring task's execution time from the source codes. The proposed method measures the execution time through the control flow graph created from the source codes instead of the executable codes. However, the control flow graph created from the source code does not have information about execution time. Therefore, in order to provide this information, the proposed method identifies the relationships between statements in the source code and instructions in the executable code. By parameterizing those parts that are dependent on processors based on the relationships, it is possible to enhance the flexibility of the tool that measures the worst-case execution time.

• Proceedings of the KSRS Conference
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• 2005.10a
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• pp.759-762
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• 2005

Recently, Intelligent Transportation System(ITS) has been applied to satisfy increasing traffic demand every year and to solve many traffic problems. Especially, Advanced Traveller Information System(ATIS) is a transportation system to optimize the trip of each other vehicle. It is important to provide the driver with quick and comfortable path from source to destination. However, it is difficult to provide a shortest path in a road network with dynamic cost. Because the existing research has a static cost. Therefore, in this paper we propose an operator for searching traffic dependent shortest path. The proposed operator finds the shortest path from source to destination using a current time cost and a difference cost of past time cost. Such a method can be applied to the road status with time. Also, we can expect a predicted arrival time as well as the shortest path from source to destination. It can be applied to efficiently application service as ITS and have the advantages of using the road efficiently, reducing the distribution cost, preparing an emergency quickly, reducing the trip time, and reducing an environmental pollution owing to the saving the fuel.

• The Transactions of the Korea Information Processing Society
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• v.5 no.8
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• pp.2041-2049
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• 1998

This paper suggests a technique for program segmentation and maintenance using PSDG(Post-State Dependency Graph) that improves the quality of a software by identifying and detecting defects in already fixed source code. A program segmentation is performed by utilizing source code analysis which combines the measures of static, dynamic and semantic slicing when we need understandability of defect in programs for corrective maintanence. It provides users with a segmental principle to split a program by tracing state dependency of a source code with the graph, and clustering and highlighting, Through a modeling of the PSDG, elimination of ineffective program deadcode and generalization of related program segments arc possible, Additionally, it can be correlated with other design modeb as STD(State Transition Diagram), also be used as design documents.

• Nuclear Engineering and Technology
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• v.54 no.2
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• pp.764-769
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• 2022

The United Arab Emirates is currently building and operating four units of the APR-1400 developed by a South Korean vendor, Korea Electric Power Corporation (KEPCO). This paper attempts to perform APR-1400 reactor core analysis by using the well-known two-step method. The two-step method was applied to the APR-1400 first cycle using the open-source nodal diffusion code, KOMODO. In this study, the group constants were generated using CASMO-4 fuel transport lattice code. The simulation was performed in Hot Zero Power (HZP) at steady-state and transient conditions. Some typical parameters necessary for the Nuclear Design Report (NDR) were evaluated in this paper, such as effective neutron multiplication factor, control rod worth, and critical boron concentration for steady-state analysis. Other parameters such as reactivity insertion, power, and fuel temperature changes during the Reactivity Insertion Accident (RIA) simulation were evaluated as well. The results from KOMODO were verified using PARCS and SIMULATE-3 nodal core simulators. It was found that KOMODO gives an excellent agreement.

• ETRI Journal
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• v.26 no.6
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• pp.575-582
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• 2004

Fully-depleted silicon-on-insulator (FD-SOI) devices with a 15 nm SOI layer thickness and 60 nm gate lengths for analog applications have been investigated. The Si selective epitaxial growth (SEG) process was well optimized. Both the single- raised (SR) and double-raised (DR) source/drain (S/D) processes have been studied to reduce parasitic series resistance and improve device performance. For the DR S/D process, the saturation currents of both NMOS and PMOS are improved by 8 and 18%, respectively, compared with the SR S/D process. The self-heating effect is evaluated for both body contact and body floating SOI devices. The body contact transistor shows a reduced self-heating ratio, compared with the body floating transistor. The static noise margin of an SOI device with a $1.1\;{\mu}m^2$ 6T-SRAM cell is 190 mV, and the ring oscillator speed is improved by 25 % compared with bulk devices. The DR S/D process shows a higher open loop voltage gain than the SR S/D process. A 15 nm ultra-thin body (UTB) SOI device with a DR S/D process shows the same level of noise characteristics at both the body contact and body floating transistors. Also, we observed that noise characteristics of a 15 nm UTB SOI device are comparable to those of bulk Si devices.

• Geophysics and Geophysical Exploration
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• v.14 no.2
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• pp.146-151
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• 2011

A method to evaluate and to reduce the source- and receiver- consistent noise in a cross-well travel time data was proposed. These systematic noises, which can cause some serious effects on the result of a travel time tomography, can be considered as the source and receiver statics. The method evaluates the statics through a curve-fitting of the first arrival travel times in the common source and common receiver gathers. Feasibility study was conducted on a synthetic data which simulates the cross-well travel time tomography to detect a small scale tunnel in a uniform background medium. First arrival travel times at a given source and receiver points are computed by a raytracing method, and the source consistent- and receiver consistent noises are added to the record. In case of the added noise with rms amounting to 25% of the maximum expected anomalous travel time delays, it is confirmed that the method successfully extracted the noise at the 7th step of iteration.