• Proceedings of the KWS Conference
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• 2002.10a
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• pp.791-797
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• 2002

This paper introduces the partial melting process for solder application and characterization of its feasibility using Sn-Ag, and Sn-Cu solder alloys. ill order to show that the liquid phase in the semi-liquid state maintains the similar wettability as single-phase liquid, the wetting balance tests are conducted with varying temperatures and compositions. Also, as a new soldering technology, the microstructural and mechanical test were investigated. The results from this research indicate that the partial melting can yield satisfactory sider joints as long as the liquid phase acquires sufficient chemical activity. At a condition where the partial melting is effective, a direct correlation between the wettability and the surface tension is found to exist.

• Proceedings of the KWS Conference
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• 2008.05a
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• pp.11-11
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• 2008

• Journal of Applied Reliability
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• v.7 no.2
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• pp.45-55
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• 2007

In this study, two types of fatigue tests were conducted. Firs, cyclic bending tests were performed using the micro-bending tester. Second, thermal fatigue tests were conducted using a pseudo power cycling machine which was newly developed for a realistic testing condition. A three-dimensional finite element analysis model was constructed. A finite element analysis using ABAQUS was performed to extract the applied stress and strain in the solder joints. Creep deformation was dominant in thermal fatigue and plastic deformation was main parameter for bending failure. From the inelastic energy dissipation per cycle versus fatigue life curve, it can be found that the bending fatigue life is longer than the thermal fatigue life.

• Journal of the Microelectronics and Packaging Society
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• v.22 no.1
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• pp.27-34
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• 2015

The correlation between crack propagation and localized recrystallization are compared in a series of cross section analyses on thermal cycled edgebond and underfilm material applied wafer level chip scale package (WLCSP) components with a baseline of no-material applied WLCSP components. The results show that the crack propagation distribution and recrystallization region correlation can explain potential degradation mechanisms and support the damage accumulation history in a more efficient way. Edgebond material applied components show a shift of damage accumulation to a more localized region, thus potentially accelerated the degradation during thermal cycling. Underfilm material applied components triggered more solder joints for a more wider distribution of damage accumulation resulting in a slightly improved thermal cycling performance compared to no-material applied components. Using an analysis on localized distribution of recrystallized areas inside the solder joint showed potential value as a new analytical approach.

• Journal of Welding and Joining
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• v.32 no.3
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• pp.53-59
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• 2014

The mechanical stability of solder joints in electronic devices with Sn-Ag-Cu is a continuous issue since the material was applied to the industry. Various shock test methods were developed and standardized tests are used in the industry worldwide. Although it is applied for several years, the detailed mechanism of the shock induced failure mechanism is still under investigation. In this study, the effect of external temperature was observed on large Flip-chip BGA components. The weight and size of the large package produced a high strain region near the corner of the component and thus show full fracture at around 200G level shock input. The shock performance at elevated temperature, at $100^{\circ}C$ showed degradation based on board pad designs. The failure mode and potential failure mechanisms are discussed.

• Proceedings of the KWS Conference
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• 2005.06a
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• pp.19-21
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• 2005

The ball shea. tests for ball grid array (BGA) and flip chip packages were carried out with different displacement rates to find out the optimum condition of the displacement rate for this test. The BGA packages consisted of two different kinds of solder balls (eutectic Sn-37wt.%Pb and Sn-3.5wt.%Ag) and electroplated Au/Ni/Cu substrate, whereas the flip chip package consisted of electroplated Sn-37Pb solder and Cu UBM. The packages were reflowed up to 10 times, or aged at 443 K up to 21 days. The variation of the displacement rate resulted in the variations of the shear properties such as shear force, displacement rate at break, fracture mode and strain rate sensitivity. The increase in the displacement rate led to the increase of the shear force and brittleness of solder joints.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2005.11a
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• pp.143-146
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• 2005

In modern automotive control modules, mechanical failures of surface mounted electronic components such as microprocessors, crystals, capacitors, transformers, inductors, and ball grid array packages, etc., are mai or roadblocks to design cycle time and product reliability. This paper presents a general methodology of failure analysis and fatigue prediction of these electronic components under automotive vibration environments. Mechanical performance of these packages is studied through finite element modeling approach fur given vibration environments in automotive application. Using the results of vibration simulation, fatigue lift is predicted based on cumulative damage analysis and material durability information. Detailed model of solder/lead joints is built to correlate the system level model and obtain solder strains/stresses. The primary focus in this paper is on surface-mount interconnect fatigue failures and the critical component selected for this analysis is 80 pin plastic leaded microprocessor.

• Progress in Superconductivity and Cryogenics
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• v.17 no.1
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• pp.25-27
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• 2015

The experimental investigation of resistance and thermal impacts stability of coated conductor joints has been carried out. We measured resistances of solder layers with the thicknesses ca. 10, 20, 30 and $40{\mu}m$ and additionally studied their stability against thermal impacts. The obtained results show a high quality of this joints and their applicability, e.g., for design of current leads in various superconductive energy applications.

• International Journal of Korean Welding Society
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• v.5 no.1
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• pp.15-28
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• 2005

The ball shear test was investigated in terms of the effects of test parameters, i.e., shear height and shear speed, with an experimental and non-linear finite element analysis for evaluating the solder joint integrity of area array packages. Two representative Pb-free solder compositions were examined in this work: Sn-3.5Ag-0.75Cu and In-48Sn. The substrate was a common SMD type with solder bond pad openings of 460 $\mu$m in diameter. The microstructural investigations were carried out using SEM, and the IMCs were identified with EDS. Shear tests were conducted with the two varying test parameters. It could be observed that increasing shear height, at fixed shear speed, has the effect of decreasing shear force for both Sn-3.5Ag-0.75Cu and In-48Sn solder joints, while the shear force increased with increasing shear speed at fixed shear height. Too high shear height could cause some undesirable effects on the test results such as unexpected high standard deviation values or shear tip sliding from the solder ball. The low shear height conditions were favorable for screening the type of brittle interfacial fractures or the degraded layers in the interfaces. The shear speed conditions were discussed with the stress analyses of the solder ball, and we cannot find any conspicuous finding which is related to optimum shear speed from the stress analyses.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.21 no.2
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• pp.225-231
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• 2012

Drop simulations of the board level in the flip chips with solder joints have been highlighted for years, recently. Also, through the study on the life prediction of thermal fatigue in the flip chips considering underfill, its importance has been issued greatly. In this paper, dynamic analysis using the implicit method in the Finite Element Analysis (FEA) is carried out to assess the factors effecting on flip chips considering underfill. The design parameters are size and thickness of chip, and size, pitch and array of solder ball with composition of Sn1.0Ag0.5Cu. The board systems by JEDEC standard is modeled with various design parameter combinations, and through these simulations, maximum yield stress and strain at each chip are shown at the solder balls. Modal analysis is simulated to find out the relation between drop impact and vibration of the board system.