• Title/Summary/Keyword: single crystal thin film

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CMnAl TRIP Steel Surface Modification During CGL Processing

  • Gong, Y.F.;Lee, Y.R.;Kim,, Han-S.;Cooman, B.C.De
    • Corrosion Science and Technology
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    • v.9 no.2
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    • pp.81-86
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    • 2010
  • The mechanisms of selective oxidation of intercritically annealed CMnAl TRIP steels in a Continuous Galvanizing Line (GCL) were studied by cross-sectional observation of the surface and sub-surface regions by means of High Resolution Transmission Electron Microscopy (HR-TEM). The selective oxidation and nitriding of an intercritically annealed CMnAl TRIP steel in a controlled dew point 10%$H_2+N_2$ atmosphere resulted in the formation of c-xMnO.$MnO_2$ (1${\leq}$x<3) and c-xMnO.$Al_2O_3$ ($x{\geq}1$) particles on the steel surface. Single crystal c-xMnO.$SiO_2$ ($2{\leq}x{\leq}4$) oxide particles were also observed on the surface. A thin film of crystalline c-xMnO.$SiO_2$ (2${\leq}$x<3) and c-xMnO.$Al_2O_3$ ($x{\geq}1$) was present between these particles. In the sub-surface region, internal oxidation, nitriding and intermetallic compound formation were observed. In the first region, large crystalline c-xMnO.$SiO_2$ ($1{\geq}x{\geq}2$) and c-xMnO.$Al_2O_3$ ($x{\geq}1$) oxides particles were present. In the second region, c-AlN particles were observed, and in a third region, small $MnAl_x$ (x>1) intermetallic compound particles were observed.

DFabrication of $GdAlO_3$ Buffer Layers by Sol-Gel Processing (졸-겔법에 의한 $GdAlO_3$ 버퍼층의 제조)

  • Bang, Jae-Cheol
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.5
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    • pp.801-804
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    • 2006
  • [ $GdAlO_3(GAO)$ ] buffer layer for $YBa_2Cu_3O_{7-{\delta}}(YBCO)$ coated superconductor wire was fabricated by sol-gel processing. Precursor solution was prepared by dissolving 1:1 stoichiometric quantaties of gadolinium nitrate hexahydrate and aluminum nitrate nonahydrate in methanol. The solution was spin-coated on $SrTiO_3(STO)$(100) single crystal substrates and heated at $1000^{\circ}C$ for 2h in wet $N_2-5%\; H_2$, atmosphere. A SEM(scanning electron microscopy) observation of the surface morphology of the GAO layer has shown that it has a faceted morphology indicating epitaxy. It was shown from x-ray diffraction(XRB) that GAO buffer layer was highly c-axis oriented epitaxial thin film with both good out-of-plane($FWHM=0.29^{\circ}$ for the (002) reflection) and in-plane ($FWHM=1.10^{\circ}$ for the {112} reflection) alignment.

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Effects of Blended TIPS-pentacene:ph-BTBT-10 Organic Semiconductors on the Photoresponse Characteristics of Organic Field-effect Transistors (TIPS-pentacene:ph-BTBT-10 혼합 유기반도체가 유기전계효과트랜지스터 광반응 특성에 미치는 영향)

  • Chae Min Park;Eun Kwang Lee
    • Clean Technology
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    • v.30 no.1
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    • pp.13-22
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    • 2024
  • In this study, blended 6,13-Bis(triisopropylsilylethynyl)pentacene (TP):2-Decyl-7-phenyl[1]benzothieno[3,2-b][1] benzothiophene (BT):Poly styrene (PS) TFT at different ratios were explored for their potential application as light absorption sensors. Due to the mixing of BT, both off current reduction and on/off ratio improvement were achieved at the same time. In particular, the TP:BT:PS (1:0.25:1 w/w) sample showed excellent light absorption characteristics, which proved that it is possible to manufacture a high-performance light absorption device. Through analysis of the crystal structure and electrical properties of the various mixing ratios, it was confirmed that the TP:BT:PS (1:0.25:1 w/w) sample was optimal. The results of this study outline the expected effects of this innovation not only for the development of light absorption devices but also for the development of mixed organic semiconductor (OSC) optoelectronic systems. Through this study, the potential to create a multipurpose platform that overcomes the limitations of using a single OSC and the potential to fabricate a high-performance OSC TFT with a fine-tuned optical response were confirmed.

Growth of SiC Oxidation Protective Coating Layers on graphite substrates Using Single Source Precursors

  • Kim, Myung-Chan;Heo, Cheol-Ho;Park, Jin-Hyo;Park, Seung-Jun;Han, Jeon-Geon
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.122-122
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    • 1999
  • Graphite with its advantages of high thermal conductivity, low thermal expansion coefficient, and low elasticity, has been widely used as a structural material for high temperature. However, graphite can easily react with oxygen at even low temperature as 40$0^{\circ}C$, resulting in CO2 formation. In order to apply the graphite to high temperature structural material, therefore, it is necessary to improve its oxidation resistive property. Silicon Carbide (SiC) is a semiconductor material for high-temperature, radiation-resistant, and high power/high frequency electronic devices due to its excellent properties. Conventional chemical vapor deposited SiC films has also been widely used as a coating materials for structural applications because of its outstanding properties such as high thermal conductivity, high microhardness, good chemical resistant for oxidation. Therefore, SiC with similar thermal expansion coefficient as graphite is recently considered to be a g행 candidate material for protective coating operating at high temperature, corrosive, and high-wear environments. Due to large lattice mismatch (~50%), however, it was very difficult to grow thick SiC layer on graphite surface. In theis study, we have deposited thick SiC thin films on graphite substrates at temperature range of 700-85$0^{\circ}C$ using single molecular precursors by both thermal MOCVD and PEMOCVD methods for oxidation protection wear and tribological coating . Two organosilicon compounds such as diethylmethylsilane (EDMS), (Et)2SiH(CH3), and hexamethyldisilane (HMDS),(CH3)Si-Si(CH3)3, were utilized as single source precursors, and hydrogen and Ar were used as a bubbler and carrier gas. Polycrystalline cubic SiC protective layers in [110] direction were successfully grown on graphite substrates at temperature as low as 80$0^{\circ}C$ from HMDS by PEMOCVD. In the case of thermal MOCVD, on the other hand, only amorphous SiC layers were obtained with either HMDS or DMS at 85$0^{\circ}C$. We compared the difference of crystal quality and physical properties of the PEMOCVD was highly effective process in improving the characteristics of the a SiC protective layers grown by thermal MOCVD and PEMOCVD method and confirmed that PEMOCVD was highly effective process in improving the characteristics of the SiC layer properties compared to those grown by thermal MOCVD. The as-grown samples were characterized in situ with OES and RGA and ex situ with XRD, XPS, and SEM. The mechanical and oxidation-resistant properties have been checked. The optimum SiC film was obtained at 85$0^{\circ}C$ and RF power of 200W. The maximum deposition rate and microhardness are 2$mu extrm{m}$/h and 4,336kg/mm2 Hv, respectively. The hardness was strongly influenced with the stoichiometry of SiC protective layers.

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A 1280-RGB $\times$ 800-Dot Driver based on 1:12 MUX for 16M-Color LTPS TFT-LCD Displays (16M-Color LTPS TFT-LCD 디스플레이 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 드라이버)

  • Kim, Cha-Dong;Han, Jae-Yeol;Kim, Yong-Woo;Song, Nam-Jin;Ha, Min-Woo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.98-106
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    • 2009
  • This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.