• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.216-219
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• 2005

In precision length measurements using optical interferometry based on homodyne or heterodyne principles, it is crucial to have frequency-stabilized monochromatic light sources. To the end, we investigate the possibility of utilizing the optical comb constituted by ultrashort femtosecond pulse lasers generated from a gain medium of titanium-doped aluminium oxide $(Ti:Al_2O_3)$. The optical comb is stabilized by locking to the caesium atomic clock, which allows all the modes of the comb to maintain an extremely high level of frequency stabilization to precision of one part in $10^{16}$. Then, high precision length measurements are realized by extracting a single or group of particularly wanted optical frequency components or by adopting a third-party light source locked to the comb. Required measurement system setup will be presented in detail along with experimental results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.9
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• pp.1702-1708
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• 2007

Dragon Stream Cipher is proposed for software base implementation in the eSTREAM project. Now this stream cipher is selected as a phase 3 focus candidate. Dragon is a new stream cipher contructed using a single word based NIFSR(non-linear feed back shift register) and 128/256 key/IV(Initialization Vector). Dragon is the keystream generator that produce 64bits of keystream. In this paper, we present an implementation of Drag(m stream cipher algorithm in hardware. Finally, the implementation is on Altera FPGA device, EP3C35F672I and the timing simulation is done on Altera's Quartus II. A result of 111MHz maximum clock rate and 7.1Gbps is throughput is obtained from the implementation.

• Nuclear Engineering and Technology
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• v.50 no.8
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• pp.1298-1305
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• 2018

The use of System-on-Chip (SoC) solutions in the design of on-board data handling systems is an important step towards further miniaturization in space. However, the Total Ionizing Dose (TID) and Single Event Effects (SEE) characterization of these complex devices present new challenges that are either not fully addressed by current testing guidelines or may result in expensive, cumbersome test configurations. In this paper we report the test setups, procedures and results for TID testing of a SoC microcontroller both using standard $^{60}Co$ and low-energy protons beams. This paper specifically points out the differences in the test methodology and in the challenges between TID testing with proton beam and with the conventional gamma ray irradiation. New test setup and procedures are proposed which are capable of emulating typical mission conditions (clock, bias, software, reprogramming, etc.) while keeping the test setup as simple as possible at the same time.

• Journal of The Korean Astronomical Society
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• v.55 no.6
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• pp.207-213
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• 2022

The Seoul Radio Astronomy Observatory (SRAO) operates a 6.1-meter radio telescope on the Gwanak campus of Seoul National University. We present the efforts to reform SRAO to a Very Long Baseline Interferometry (VLBI) station, motivated by recent achievements by millimeter interferometer networks such as Event Horizon Telescope, East Asia VLBI Network, and Korean VLBI Network (KVN). For this goal, we installed a receiver that had been used in the Combined Array for Research in Millimeter-wave Astronomy and a digital backend, including an H-maser clock. The existing hardware and software were also revised, which had been dedicated only to single-dish operations. After several years of preparations and test observations in 1 and 3-millimeter bands, a fringe was successfully detected toward 3C 84 in 86 GHz in June 2022 for a baseline between SRAO and KVN Ulsan station separated by 300 km. Thanks to the dual frequency operation of the receiver, the VLBI observations will soon be extended to the 1 mm band and verify the frequency phase referencing technique between 1 and 3-millimeter bands.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.96-103
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• 2006

This paper proposes a new technique for improving the efficiency of single phase high frequency switch mode boost converter. This converter includes an additional boost converter that follows the main hish frequency switching device. The additional converter, which is controlled at lower frequencies, bypasses almost all the current in the main switch and the high frequency switching loss is greatly reduced. Both switching devices are controlled by a simple method; each controller consists of a one-shot multivibrator, a comparator and an AND gate, and the maximum switching frequency can be limited without any clock generator. The converter works cooperatively in high efficiency and acts as though it were a conventional high frequency switch mode converter with one switching device. This paper describes the proposed converter configuration, design, and discusses the steady state performance concerning the switching loss reduction and efficiency improvement. and the proposed method is verified by computer simulation.

• Physical Therapy Rehabilitation Science
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• v.6 no.3
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• pp.134-139
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• 2017

Objective: Dual-task interference is defined as decrements in performance observed when people attempt to perform two tasks concurrently, such as a verbal task and walking. The purpose of this study was to investigate the changes of gait ability according to the dual task interference in chronic stroke survivors. Design: Cross-sectional study. Methods: Ten chronic stroke survivors (9 male, 1 female; mean age, 55.30 years; mini mental state examination, 19.60; onset duration, 56.90 months) recruited from the local community participated in this study. Gait ability (velocity, paretic side step, and stride time and length) under the single- and dual-task conditions at a self-selected comfortable walking speed was measured using the motion analysis system. In the dual task conditions, subjects performed three types of cognitive tasks (controlled oral word association test, auditory clock test, and counting backwards) while walking on the track. Results: For velocity, step and stride length, there was a significant decrease in the dual-task walking condition compared to the single walking condition (p<0.05). In particular, higher reduction of walking ability was observed when applying the counting backward task. Conclusions: Our results revealed that the addition of cognitive tasks while walking may lead to decrements of gait ability in stroke survivors. In particular, the difficulty level was the highest for the calculating task. We believe that these results provide basic information for improvements in gait ability and may be useful in gait training to prevent falls after a stroke incident.

• The Journal of the Convergence on Culture Technology
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• v.3 no.3
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• pp.27-30
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• 2017

IoT could be applied to various areas because of the important role of sensor. The existing sensor communication method is to quickly transmit data by using clock and two data pins based on the I2C serial communication method. As the objects used are gradually light-weighted and the amount of data transmission is decreased, the simplification of hardware is more emphasized as an essential design element than the speed of transmission. This paper designed a circuit to send/receive data in series, and also realized arduino, by analyzing the existing communication method and then using a single pin for light-weight. The single pin serial communication could reduce power consumption, which is suitable for the sensor area using digital communication of IoT area.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.13-22
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• 1998

In this paper, we propose a high-performance BICS(built-in current sensor) which is fabricated in 0.8${\mu}{\textrm}{m}$ single-poly two-metal process for IDDQ testing of CMOS VLSI circuit. The CUT(circuit under test) is 4-bit full adder with a bridging fault. Using two nMOSs that have different size, two bridging faults that have different resistance values are injected in the CUT. And controlling a gate node, we experimented various fault effects. The proposed BICS detects the faulty current at the end of the clock period, therefore it can test a CUT that has a much longer critical propagation delay time and larger area than conventional BICSs. As expected in the HSPICE simulation, experimental results of fabricated chip demonstrated that the proposed BICS can exactly detect bridging faults in the circuit.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.6
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• pp.279-283
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• 2012

In is paper, we design and implement the low power, high speed touch screen controller that calculates and outputs the coordinate of touch point on the touch screen of mobile devices. The system clock is 10HMz, the number of input channels is 21, standby current is $20{\mu}A$, dynamic range of input is 140pF~400pF and the response time is 0.1ms/frame. It contains the power management unit for low power, automatic impedance calibration unit in order to adapt to humidity, temperature and evaluation board, adjacent key and pattern interference suppression unit, serial interface unit of I2C and SPI. The function and performance is verified by using FPGA and $0.18{\mu}m$ CMOS standard process. The implemented touch screen is designed for using in the double layer ITO(Indium Thin Oxide) module with diamond pattern and single layer ITO module for cost-effective which are applied to mobile phone or smart remote controller.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.1
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• pp.49-58
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• 1999

This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.