• Title/Summary/Keyword: semiconductor scheduling

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Machine Scheduling Models Based on Reinforcement Learning for Minimizing Due Date Violation and Setup Change (납기 위반 및 셋업 최소화를 위한 강화학습 기반의 설비 일정계획 모델)

  • Yoo, Woosik;Seo, Juhyeok;Kim, Dahee;Kim, Kwanho
    • The Journal of Society for e-Business Studies
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    • v.24 no.3
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    • pp.19-33
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    • 2019
  • Recently, manufacturers have been struggling to efficiently use production equipment as their production methods become more sophisticated and complex. Typical factors hindering the efficiency of the manufacturing process include setup cost due to job change. Especially, in the process of using expensive production equipment such as semiconductor / LCD process, efficient use of equipment is very important. Balancing the tradeoff between meeting the deadline and minimizing setup cost incurred by changes of work type is crucial planning task. In this study, we developed a scheduling model to achieve the goal of minimizing the duedate and setup costs by using reinforcement learning in parallel machines with duedate and work preparation costs. The proposed model is a Deep Q-Network (DQN) scheduling model and is a reinforcement learning-based model. To validate the effectiveness of our proposed model, we compared it against the heuristic model and DNN(deep neural network) based model. It was confirmed that our proposed DQN method causes less due date violation and setup costs than the benchmark methods.

Study on Dispatching with Quality Assurance (품질을 고려한 작업투입에 관한 연구)

  • Ko, Hyo-Heon;Kim, Jihyun;Baek, Jun-Geol;Kim, Sung-Shick
    • Journal of Korean Institute of Industrial Engineers
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    • v.34 no.1
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    • pp.108-121
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    • 2008
  • Dispatching rule for parallel machines with multi product is proposed in this paper, In current market,customer's request for higher quality is increasing, In accordance with such demand, manufacturers are focusingon improving the quality of the products. Such shift in production objective is risky. The possibility ofneglecting another important factor in customer satisfaction increases, namely due dates. From the aspect ofimproving quality, frequency of product assignment to limited number of high performance machines willincrease. This will lead to increased waiting time which can incur delays, In the case of due date orientedproduct dispatch, Products are assigned to machines without consideration for quality. Overall deterioration ofproduct quality is inevitable, In addition, Poor products will undergo rework process which can increase delays.The objective of this research is dispatching products to minimize due date delays while improving overallquality. Quality index is introduced to provide means of standardizing product quality. The index is used toassure predetermined quality level while minimizing product delays when dispatching products. Qualitystandardization method and dispatching algorithm is presented. And performance evaluation is performed withcomparison to various dispatching methods.

Scalable Application Mapping for SIMD Reconfigurable Architecture

  • Kim, Yongjoo;Lee, Jongeun;Lee, Jinyong;Paek, Yunheung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.634-646
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    • 2015
  • Coarse-Grained Reconfigurable Architecture (CGRA) is a very promising platform that provides fast turn-around-time as well as very high energy efficiency for multimedia applications. One of the problems with CGRAs, however, is application mapping, which currently does not scale well with geometrically increasing numbers of cores. To mitigate the scalability problem, this paper discusses how to use the SIMD (Single Instruction Multiple Data) paradigm for CGRAs. While the idea of SIMD is not new, SIMD can complicate the mapping problem by adding an additional dimension of iteration mapping to the already complex problem of operation and data mapping, which are all interdependent, and can thus significantly affect performance through memory bank conflicts. In this paper, based on a new architecture called SIMD reconfigurable architecture, which allows SIMD execution at multiple levels of granularity, we present how to minimize bank conflicts considering all three related sub-problems, for various RA organizations. We also present data tiling and evaluate a conflict-free scheduling algorithm as a way to eliminate bank conflicts for a certain class of mapping problem.

A Spatial Adaptation Procedure for Determining Robust Dispatching Rule in Wafer Fabrication (공간적응절차를 통한 웨이퍼 가공 공정의 로버스트한 작업배정규칙 결정)

  • Baek, Dong-Hyun;Yoon, Wan-Chul;Park, Sang-Chan
    • Journal of Korean Institute of Industrial Engineers
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    • v.23 no.1
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    • pp.129-146
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    • 1997
  • In traditional approaches to scheduling problems, a single dispatching rule was used by all machines in a system. However, since the situation of each machine generally differs from those of other machines, it is reasonable to apply a different dispatching rule to each machine responding to its given situation. In this regard, we introduce the concept of spatial adaptation and examine its effectiveness by simulation. In the spatial adaptation, each machine in a system selects an appropriate dispatching rule in order to improve productivity while it strives to be in harmony with other machines. This study proposes an adaptive procedure which produces a reliable dispatching rule for each machine beginning with the bottleneck machine. The dispatching rule is composed of several criteria of which priorities are adaptively weighted. The weights are learned for each machine through systematic simulations. The simulations are conducted according to a Taguchi experimental design in order to find appropriate sets of criteria weights in an efficient and robust way in the context of environmental variations. The proposed method was evaluated in an application to a semiconductor wafer fabrication system. The method achieved reliable performance compared to traditional dispatching rules, and the performance quickly approached the peak after learning for only a few bottleneck machines.

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A Simulation Study on Capacity Planning in Hybrid Flowshops for Maximizing Throughput Under a Budget Constraint (혼합흐름공정에서 예산제약하에 생산율을 최대화하는 용량계획에 관한 시뮬레이션 연구)

  • Lee, Geun-Cheol;Choi, Seong-Hoon
    • Journal of the Korea Society for Simulation
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    • v.20 no.3
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    • pp.1-10
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    • 2011
  • In this study, we consider a capacity planning problem where the number of machines at each workstation is determined in manufacturing systems of top-edge electronic products such as semiconductor or display. The considered manufacturing system is the typical hybrid flowshop which has identical parallel machines at each workstation and the setup operation occurs when the types of consecutively processed products are different. The objective of the problem is finding good combinations of the numbers of machines at all workstations, under the given capital amount for purchasing machines. Various heuristic methods for determining the numbers of machines at workstations are proposed and the performances were tested through a series of computational experiments. In the study, a simulation model has been developed in order to simulate the considered manufacturing system with dynamic orders and complex process. The simulation model is also used for conducting the computational comparison test among various proposed methods.

Research Trends of Mixed-Criticality System (중요도 혼재 시스템의 연구 동향 분석)

  • Yoon, Moonhyung;Park, Junho;Kim, Yongho;Yi, JeongHoon;Koo, BongJoo
    • The Journal of the Korea Contents Association
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    • v.18 no.9
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    • pp.125-140
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    • 2018
  • Due to rapid development of semiconductor technology, embedded systems have been developed from single-functional system to the multi-functional system. The system composed of software that has different criticality level is called Mixed-Criticality System. Currently, the project related to the Mixed-Criticality System is accelerating the efforts to seek the development direction and take technical initiatives led by EU and USA where the related industry has developed, but the movement in Korea is yet insignificant. Therefore, it is urgent to perform the research and project of various basic technologies to occupy the initiative for the related technology and market. In this paper, we analyze the trends of major project researches and developments related to the MCS. First, after defining the definition of the MCS and system model, we analyze the underlying technology constituting the MCS. In addition, we analyze the project trends of each country researching MCS and discuss the future research areas. Through this study, it is possible to grasp the research trends of the world in order to establish the research direction of the MCS and to lay the foundation for the integration into the military system.

A Study of Competency for R&D Engineer on Semiconductor Company (반도체 기술 R&D 연구인력의 역량연구 -H사 기업부설연구소를 중심으로)

  • Yun, Hye-Lim;Yoon, Gwan-Sik;Jeon, Hwa-Ick
    • 대한공업교육학회지
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    • v.38 no.2
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    • pp.267-286
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    • 2013
  • Recently, the advanced company has been sparing no efforts in improving necessary core knowledge and technology to achieve outstanding work performance. In this rapidly changing knowledge-based society, the company has confronted the task of creating a high value-added knowledge. The role of R&D workforce that corresponds to the characteristic and role of knowledge worker is getting more significant. As the life cycle of technical knowledge and skill shortens, in every industry, the technical knowledge and skill have become essential elements for successful business. It is difficult to improve competitiveness of the company without enhancing the competency of individual and organization. As the competency development which is a part of human resource management in the company is being spread now, it is required to focus on the research of determining necessary competency and to analyze the competency of a core organization in the research institute. 'H' is the semiconductor manufacturing company which has a affiliated research institute with its own R&D engineers. Based on focus group interview and job analysis data, vision and necessary competency were confirmed. And to confirm whether the required competency by job is different or not, analysis was performed by dividing members into workers who are in charge of circuit design and design before process development and who are in the process actualization and process development. Also, this research included members' importance awareness of the determined competency. The interview and job analysis were integrated and analyzed after arranging by groups and contents and the analyzed results were resorted after comparative analysis with a competency dictionary of Spencer & Spencer and competency models which are developed from the advanced research. Derived main competencies are: challenge, responsibility, and prediction/responsiveness, planning a new business, achievement -oriented, training, cooperation, self-development, analytic thinking, scheduling, motivation, communication, commercialization of technology, information gathering, professionalism on the job, and professionalism outside of work. The highly required competency for both jobs was 'Professionalism'. 'Attitude', 'Performance Management', 'Teamwork' for workers in charge of circuit design and 'Challenge', 'Training', 'Professionalism on the job' and 'Communication' were recognized to be required competency for those who are in charge of process actualization and process development. With above results, this research has determined the necessary competency that the 'H' company's affiliated research institute needs and found the difference of required competency by job. Also, it has suggested more enthusiastic education methods or various kinds of education by confirming the importance awareness of competency and individual's level of awareness about the competency.