• Title/Summary/Keyword: sampling frequency

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A new criterion for determining the sampling rate of digital controller (디지털제어기의 제어주기 결정방법에 관한 연구)

  • 이준화;문홍주;정병근
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.360-360
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    • 2000
  • In this paper, a new criterion f9r determining the sampling rate of digital conroller is proposed. This paper will introduce a method fur determining the appropriate sampling rate of digital controller which can be substituted with the given analog controller, using phase margin and gain cross over frequency, not rising time or bandwidth of the closed-loop system. This method also guarantees performance of the system. Without exact modeling functions of the plant, abstracting those functions, this paper can achieve stability and aimed performance of the system, and this paper proved it with proper modeling functions.

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Real-time surface acoustic wave reader platform implementation in the frequency domain sampling method using a Cortex-A9 (Cortex-A9을 이용한 주파수 영역 샘플링 방식의 실시간 표면 탄성파 리더 플랫폼 구현)

  • Yoon, Sang-hun;kim, Young-kil
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.05a
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    • pp.343-345
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    • 2015
  • Currently, SAW Device has been used as a frequency filter using the property of passing only a desired frequency with a narrow bandwidth. However, the areas of activity in various fields since the permanent advantages can be widened by using a non-powered. These sensor tags using SAW Device has been done, but a lot of research, the development of the state still insufficient for Reader Platform. How to read the value of the ID Tag Using SAW Device has a time domain sampling (TDS) method and a frequency domain sampling (FDS) method. The purpose of the paper, we use the FDS method that requires high-speed processing with a relatively slow sampling rate does not require high-speed sampling. Reader Platform was the way to detect ID through PC as FDS way, but It is based on the Cortex-A9 processor and it works a low price, compact and real-time Reader Platform.

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A Timing Recovery Scheme for Variable Symbol Rate Digital M-ary QASK Receiver (가변 심볼율 MQASK(M-ary Quadrature Amplitude Keying) 디지털 수신기를 위한 타이밍 복원 방안)

  • Baek, Daesung;Lim, Wongyu;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.7
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    • pp.545-551
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    • 2013
  • Timing recovery loop composed of the Timing Error Detector(TED), loop filter and resampler is widely used for the timing synchronization in MQASK receivers. Since TED is sensitive to the delay between the symbol period of the signal and sampling period, the output is averaged out when the symbol rate and sampling rate are quite different the recovery loop cannot work at all. This paper presents a sampling frequency discriminator (SRD), which detects the frequency offset of the sampling clock to the symbol clock of the MQASK data transmitted. Employing the SRD, the closed loop timing recovery scheme performs the frequency-aided timing acquisition and achieve the synchronization at extremely high sampling frequency offset, which can be used in variable symbol rate MQASK receivers.

A study on the implementation simulation and system for 2-D doppler system using second-order sampling (2차 샘플링을 이용한 2-D 도플러 시스템의 시뮬레이션과 시스템구현에 관한 연구)

  • 임춘성;임용곤
    • Journal of Biomedical Engineering Research
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    • v.11 no.1
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    • pp.147-156
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    • 1990
  • A two-dimensional pulsed doppler system for ultrasonic blood velocity doppler signals is studied and implemented. The second-order sampling method and serial data processing procedures are utillized in the sys- tem, which eliminates the untuning problems at phase channels in the quadrature detection method as well as in the channels of parallel data processing. rho digital signal processor used in this system allows a hardware savings and flexible design options. The efficiency of the various mean frequency estimators in the second-order sampling system is examined by computer simulation as a function of the intersequence sample delay time. The temporal delay for the quadrature component is changed from $1/(4f_o){\;}to{\;}3/(4f_o){\;}and{\;}5/(4f_o)$ where to is the center frequency of the transducer, It is found that autocorrelator is the optimum frequency estimator for the second-order sampling: with !he intersequence sample delay of $1/(4f_o){\;}to{\;}3/(4f_o){\;}and{\;}5/(4f_o)$. The qualitative variation and information proportional to blood velocity in the vessel system are obtained in the VIVO experiments.

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Complex Bandpass Sampling Technique and Its Generalized Formulae for SDR System (SDR 시스템을 위한 Complex Bandpass Sampling 기법 및 일반화 공식의 유도)

  • Bae, Jung-Hwa;Ha, Won;Park, Jin-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7C
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    • pp.687-695
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    • 2005
  • A bandpass sampling technique, which is a method directly downconverting a bandpass signal to a baseband or a low IF signal without analog mixers, can be an alterative choice for the SDR system to minimize the RF front-end. In this paper, a complex bandpass sampling technique for two bandpass-filtered signals is proposed. We derived generalized formulae for the available sampling range, the signal's IF and the minimum sampling frequency taking into consideration the guard-bands for the multiple RE signals. Thru the simulation experiments, the advantages of the . complex bandpass sampling over the pre-reported real bandpass sampling are investigated for applications in the SDR design.

The Multiband Interpolant Filter in the Second-order BPS System (2차 BPS 시스템의 다중 대역 interpolant 필터)

  • Kim, Hyuk;Baek, Jein
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.225-230
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    • 2013
  • In a bandpass sampling (BPS), the frequency of the sampler is lower than that of the signal being sampled. In this method, the baseband spectrum directly appears by the sampling operation, so that it is not necessary to use any frequency down-converter, which makes the receiver's hardware simpler. The second-order BPS uses two identical BPS samplers, of which sampling times are offset by each other. By exploiting the relationship between two sampled signals, it can be possible to cancel the aliased signal component or the interference due to the bandpass sampling. In order to cancel the interference, an interpolant filter is used to manipulate the phase characteristics of the BPS sampled signal. In this paper, it is introduced a multiband interpolant filter which can simultaneously cancel multiple interference signals that have been aliased from multiple frequency bands. In case of no need of interference cancellation, another method is suggested to enhance the signal quality by 3dB. A computer simulation has been performed, and the feasibility of the suggested methods has been verified.

A 12 bit 750 kS/s 0.13 mW Dual-sampling SAR ADC

  • Abbasizadeh, Hamed;Lee, Dong-Soo;Yoo, Sang-Sun;Kim, Joon-Tae;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.760-770
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    • 2016
  • A 12-bit 750 kS/s Dual-Sampling Successive Approximation Register Analog-to-Digital Converter (SAR ADC) technique with reduced Capacitive DAC (CDAC) is presented in this paper. By adopting the Adaptive Power Control (APC) technique for the two-stage latched type comparator and using bootstrap switch, power consumption can be reduced and overall system efficiency can be optimized. Bootstrapped switches also are used to enhance the sampling linearity at a high input frequency. The proposed SAR ADC reduces the average switching energy compared with conventional SAR ADC by adopting reduced the Most Significant Bit (MSB) cycling step with Dual-Sampling of the analog signal. This technique holds the signal at both comparator input asymmetrically in sample mode. Therefore, the MSB can be calculated without consuming any switching energy. The prototype SAR ADC was implemented in $0.18-{\mu}m$ CMOS technology and occupies $0.728mm^2$. The measurement results show the proposed ADC achieves an Effective Number-of-Bits (ENOB) of 10.73 at a sampling frequency of 750 kS/s and clock frequency of 25 MHz. It consumes only 0.13 mW from a 5.0-V supply and achieves the INL and DNL of +2.78/-2.45 LSB and +0.36/-0.73 LSB respectively, SINAD of 66.35 dB, and a Figures-of-Merit (FoM) of a 102 fJ/conversion-step.

The Design and Implementation of Frequency Domain Sampling Method for Surface Acoustic Wave Sensor Platform (주파수 영역 샘플링 방식의 표면 탄성파 센서 플랫폼 설계 및 구현)

  • Sun, Hee-Gab;Joh, Yool-Hee;Kim, Young-Kil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.218-224
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    • 2013
  • Generally, SAW device, which uses Time Domain Sampling, requires high speed A/D converter because SAW device using TDS needs high sampling speed as much as its high data speed. However, the high price of A/D converter discourages makers from using it. On the other hand, SAW device, which uses Frequency Domain Sampling, does not required high speed A/D converter because SAW device using FDS does not need high sampling speed. It is very efficient in price comparison to its performance because high processing speed of SAW device using FDS can be implemented using low price Embedded Systems. The purpose of the paper is to solve the issues above by designing and realizing SAW device(FDS) using SAW sensor for TDS.

FRAME AND LATTICE SAMPLING THEOREM FOR SUBSPACES OF $L^2$��

  • Liu, Zhan-Wei;Hu, Guo-En
    • Journal of applied mathematics & informatics
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    • v.27 no.1_2
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    • pp.195-203
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    • 2009
  • In this paper, a necessary and sufficient condition for lattice sampling theorem to hold for frame in subspaces of $L^2$(R) is established. In addition, we obtain the formula of lattice sampling function in frequency space. Furthermore, by discussing the parameters in Theorem 3.1, some corresponding corollaries are derived.

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Compensation of Timing Offset and Frequency Offset in the Multi-Band Receiver with Sub-Sampling Method (Sub-Sampling 방식의 다중 대역 수신기에서 타이밍 오프셋과 주파수 오프셋 보상)

  • Lee, Hui-Kyu;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.5
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    • pp.501-509
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    • 2011
  • Software defined radio(SDR) has a goal that places the analog-to-digital converter(ADC) as near the antenna as possible. But current technique actually can't do analog-to-digital converting about RF band signals. So one method is studying that samples RF band signals to IF band. One of the ways Sub-Sampling technique can convert signals from RF band to IF band without oscillator. If Sub-Sampling technique is used, over 2 bands can convert signals from RF band to IF band. But due to the filter performance in RF band, it is possible to generate interference between signals that is converted in low frequency band. The effect degrades performance. In this paper, we propose one method that uses time division multiplexing(TDM) method as a solution to avoid interference between signals. By doing TDM and Sub-Sampling at the same time that method can get signals without large changes of structures.