• Proceedings of the KIEE Conference
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• 1999.11c
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• pp.742-744
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• 1999

In this paper, a new precharge type PFD for fast locking time of PLL is suggested. It is realized by inserting NMOS transistor and inverter into the precharge part of PFD for isolating the reset of the Up signal from the feedback signal. The new precharge type PFD generates the Up signal while the feedback signal is fixed at a high level. Therefore the new PFD output is increased than the conventional precharge type PFD output. As a result of the increased PFD output, fast locking of PLLs is achieved. Additionally, with control the falling time of the inverter, the dead-zone is reduced and the jitter characteristics are improved. The whole characteristics of PFD and PLL are simulated by using HSPICE. Simulation results show that the dead-zone is 20ps and the locking time of PLL using the new PFD is 38ns at the 350MHz frequency of referecne signal. This value is quite small compared with conventional PFD.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1317-1318
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• 2015

최근 ICT 기술의 발전으로 원거리에 위치한 광역 상수도의 취수장, 가압장, 감압변실 및 배수지 등의 시설물은 중앙제어실에서 효율적인 설비운영을 위해 원격통합관리로 감시제어를 수행하여 생산성을 제고하고 있다. 단위사업장에 낙뢰 유입으로 인한 순간정전이나 오동작 등의 영향에 의한 누전차단기 트립 증상이나 제어계측설비의 시스템 다운현상이 발생할 경우에 전원설비나 계측제어설비를 복구하기 위해서는 운영자가 사업장 현장에 출동하여 설비를 복구해야만 한다. 출동에 따른 많은 시간과 비용이 발생할 뿐만 아니라 응급조치가 미흡할 경우에는 수돗물 공급 중단 등의 위험성이 발생할 소지가 있다. 본 논문에서는 단위사업장의 서지유입이나 설비 오동작 등의 원인으로 무인사업장 설비에 System down 현상이 발생하면 단위사업장에 출동하지 않고 원격의 중앙제어실에서 원격 명령 또는 자동 프로그램에 의한 전원 Reset 동작으로 현장 제어설비가 원활하게 동작함으로써 무인사업장의 효율적인 운영관리가 가능한 원격제어 전원관리시스템 구축사례를 제시하고자 한다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.2
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• pp.76-80
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• 2014

Dual-gate PCRAM which unify capacitor-less DRAM and NVM using a PCM instead of a typical SONOS flash memory is proposed as 1 transistor. $VO_2$ changes its phase between insulator and metal states by temperature and field. The front-gate and back-gate control NVM and DRAM, respectively. The feasibility of URAM is investigated through simulation using c-interpreter and finite element analysis. Threshold voltage of NVM is 0.5 V that is based on measured results from previous fabricated 1TPCM with $VO_2$. Current sensing margin of DRAM is 3 ${\mu}A$. PCM does not interfere with DRAM in the memory characteristics unlike SONOS NVM. This novel unified dual-gate PCRAM reported in this work has 1 transistor, a low RESET/SET voltage, a fast write/erase time and a small cell so that it could be suitable for future production of URAM.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.64-73
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• 2001

This paper presents a Zero Voltage and Zero Current Switching (ZVZCS) 3-Level DC/DC converter. This converter overcomes the drawbacks presented by the conventional Zero Voltage Switching(ZVS) 3-Level converter, such as high circulating energy, severe parastic ringing on the rectifier diodes, and limited ZVS load range for the inner switches. The converter presented in this paper uses a phase shift control with a flying capacitor in the primary side to achieve ZVS for the outer switches. Additionally, the converter uses an energy recovery snubber to reset the primary current during the free-wheeling stage to achieve ZCS for the inner switches. The proposed converters are analyzed and verified on 6kW, 39kHz experimental prototype.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.5
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• pp.239-244
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• 2006

To drive the high-image quality plasma displays of XGA and/or full-HD, we must effectively improve the driving waveform, which get the reset period for the stabilized control of wall charges, the address period to select discharge or non-discharge, and sustain period for luminance in 1 TV-frame, and also the display quality. To accomplish them, the development of the technology for the fast address discharge is required. In this paper, the correlation between the sustain-electrode gap and address discharge characteristics for the high-speed addressing was analyzed using the measurements of dynamic voltage margins. Results showed that the narrower the gap between the sustain electrodes, the narrower the with of the scan pulse became and a dynamic margin of data voltage of 29.2 V was obtained at scan pulse width of $1.0{\mu}s\;and\;V_{ramp}$ of 240 V for driving 4-inch test penal, which the gap between sustain electrodes was $65{\mu}m$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.1018-1021
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• 2009

Wireless Sensor Network collects a data from the specific area and the control is composed of small sensor nodes. Like this sensors to after that is established at the beginning are operated with the battery, the operational duration until several years must be continued from several months and will be able to apply the resources which is restricted in efficiently there must be. In this paper RHC (rounting history cache) applies in Directed Diffusion which apply a data central concept a reliability and an efficiency in data transfer course set. RHC algorithms which proposes each sensor node updated RHC of oneself with periodic and because storing the optimization course the course and, every event occurrence hour they reset the energy is wasted the fact that a reliability with minimization of duplication message improved.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.128-133
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• 2008

Phase-change random access memory (PRAM) chip cell phase of amorphous state is rapidly changed to crystal state above 160 Celsius degree within several seconds during Infrared (IR) reflow. Thus, on-board programming method is considered for PRAM chip programming. We demonstrated the functional 512Mb PRAM with 90nm technology using several novel core circuits, such as metal-2 line based global row decoding scheme, PN-diode cells based BL discharge (BLDIS) scheme, and PMOS switch based column decoding scheme. The reverse-state standby current of each PRAM cell is near 10 pA range. The total leak current of 512Mb PRAM chip in standby mode on discharging state can be more than 5 mA. Thus in the proposed BLDIS control, all bitlines (BLs) are in floating state in standby mode, then in active mode, the activated BLs are discharged to low level in the early timing of the active period by the short pulse BLDIS control timing operation. In the conventional sense amplifier, the simultaneous switching activation timing operation invokes the large coupling noise between the VSAREF node and the inner amplification nodes of the sense amplifiers. The coupling noise at VSAREF degrades the sensing voltage margin of the conventional sense amplifier. The merit of the proposed sense amplifier is almost removing the coupling noise at VSAREF from sharing with other sense amplifiers.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.6
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• pp.89-98
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• 2010

Isolated boost converter is desirable in the dc/dc converter applications where isolation is required and extremely high step up is needed. Transformer used to step up low input voltage into high output voltage must satisfy the volt-sec balance condition. Conventional isolated boost converter is controlled with conducting intervals overlapping. In this case, there is a problem that control circuit is complicated. In this paper, it is proposed and analyzed the isolated boost converter which set up a reset winding for the volt-sec balance of transformer and can construct the control circuit simple by using a self-driven switch. Finally, the validity of the theoretical analyses for the proposed converter is verified by both simulations and experiments on the 10[W] class isolated boost converter.

• Aerospace Engineering and Technology
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• v.8 no.1
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• pp.49-57
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• 2009

The camera electronics in the KOMPSAT-3 payload provides the several control clocks in order to move the charges, which are converted from the light in the pixel, in the vertical and horizontal direction. Generally, the control clocks depend on the CCD internal design in the system. The KOMPSAT-3 payload uses the CCD controlled by 3-phase vertical clocks and 4-phase timing. The camera generates the various clocks such as the vertical clocks, the horizontal clocks, the summing clocks, the reset clocks and so on. The vertical clocks are deeply related to the camera performance and synchronized with satellite scan-rate even though they are relatively slow. Also, it gives the horizontal clocks without distortion under the very fast pixel-rate. This paper shows the design and simulation of the CCD clocks driver for the KOMPSAT-3 payload.

• Annals of Clinical Neurophysiology
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• v.4 no.1
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• pp.44-50
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• 2002

Introduction : Orthostatic tremor develops in the legs while standing up with no weakness, pain or imbalance in the leg and the tremor is characteristically not observed when walking. However there have been some confusions about orthostatic tremor in several aspects. For the past ten years, we have observed 4 patients with orthostatic tremor. In each case tests were performed to investigate the following three important areas of inquiry about orthostatic tremor. Firstly, whether this disorder is an independent diagnostic entity or a variant of essential tremor. Secondly, whether the progress of this disorder is specifically related with standing posture. Lastly, the nature of the pathophysiologic mechanism behind the appearance of the tremor when standing after the lapse of a certain latent period and its disappearance upon the commencement of walking. Methods : Our 4 cases of orthostatic tremor were studied clinically, electrophysiologically, and pharmacologically. Electrophysiological tests included tremor spectrum test and electromyography. Results : We observed the presence of this tremor in several other tonic postures, as well as its absence, in a vertically lifted position from all our cases. Our cases registered a variable tremor frequency between 5 and 12 Hz according to the tremor spectrum test and EMG. Furthermore all our 4 cases demonstrated patterns of both synchronous EMG activity and alternating EMG activity at various times in homologous muscles of both legs. Orthostatic tremor was improved significantly with propranolol as well as clonazepam. Conclusions : From the results of our study we drew the following conclusions. It is probable that orthostatic tremor is simply a variant of essential tremor rather than being an independent diagnostic entity and that in most cases its development is specifically related with muscle contraction rather than merely with the act of standing. Furthermore we discovered a clue in the previously described neural control mechanism that the nuclear bag fibers in the muscle spindle have lag time of several seconds in their response to muscle strength and that their baseline does not reset fully in rapidly moving muscle. This neural control mechanism could offer sufficient explanation for the phenomena of tremor appearance when standing and disappearance when walking in orthostatic tremor.