• 제목/요약/키워드: real-time verification

검색결과 674건 처리시간 0.027초

Research on Railway Safety Common Data Model and DDS Topic for Real-time Railway Safety Data Transmission

  • Park, Yunjung;Kim, Sang Ahm
    • 한국컴퓨터정보학회논문지
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    • 제21권5호
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    • pp.57-64
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    • 2016
  • In this paper, we propose the design of railway safety common data model to provide common transformation method for collecting data from railway facility fields to Real-time railway safety monitoring and control system. This common data model is divided into five abstract sub-models according to the characteristics of data such as 'StateInfoMessage', 'ControlMessage', 'RequestMessage', 'ResponseMessage' and 'ExtendedXXXMessage'. This kind of model structure allows diverse heterogeneous data acquisitions and its common conversion method to DDS (Data Distribution Service) format to share data to the sub-systems of Real-time railway safety monitoring and control system. This paper contains the design of common data model and its DDS Topic expression for DDS communication, and presents two kinds of data transformation case studied for verification of the model design.

TMS320VC5402 DSP를 이용한 G.723.1A 음성부호화기의 실시간 구현 (Real-time Implementation of G.723.1A Speech Coder Using a TMS320VC5402 DSP)

  • 이송찬;정익주
    • 음성과학
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    • 제10권2호
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    • pp.65-75
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    • 2003
  • This paper describes the issues associated with the real-time implementation of G.723.1A dual-rate speech coder on a TMS320VC5402 DSP. Firstly, the main features of the G.723.1A speech coder and the procedure involved in the implementation using assembly and C languages are discussed. Various real-time implementation issues such as memory/MIPS tradeoffs are also presented. For fixed-point implementation, we converted the ITU-T fixed-point ANSI C code into TMS320VC5402 code in the bit-exact way through verification using the test vectors. Finally, as the result of implementation, we present the MIPS and memory requirement for the real-time operation.

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Verification of Hybrid Real Time HVDC Simulator in Cheju-Haenam HVDC System

  • Yang Byeong-Mo;Kim Chan-Ki;Jung Gil-Jo;Moon Young-Hyun
    • Journal of Electrical Engineering and Technology
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    • 제1권1호
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    • pp.23-27
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    • 2006
  • In this paper a Hybrid Real Time HVDC Simulator fur both operator Training and Researching in the Cheju-Haenam HVDC System is proposed and its performance is studied by means of RTDS (Real Time Digital Simulator), EMTDC (Electro-Magnetic Transients system for DC), PSS/E (Power System Simulator for Engineering), and experienced scenarios. The objective of this paper is to represent the strategy in development for KEPCO's hybrid HVDC simulator for the Cheju-Haenam HVDC system. This simulator consists of two DC stations, DC cables, external digital/analog controllers, monitoring systems and control desk for education, and AC networks. Its suitability for operator's education is tested during startup/shutdown and normal state operations. Dynamic performances of it are also verified.

Integer DCT와 SVM을 이용한 실시간 얼굴 검출 (Real Time Face Detection Using Integer DCT and SVM)

  • 박현선;김경수;김희정;정병희;하명환;김회율
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2112-2115
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    • 2003
  • The system for the real time face detection is described in this paper. For face verification, support vector machine (SVM) was utilized. Although SVM performs quit well, SVM has a drawback that the computational cost is high because all pixels in a mask are used as an input feature vector of SVM. To resolve this drawback, a method to reduce the dimension of feature vectors using the integer DCT was proposed. Also for the real time face detection applications, low-complexity methods for face candidate detection in a gray image were used. As a result, the accurate face detection was performed in real time.

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An Approach for GPS Clock Jump Detection Using Carrier Phase Measurements in Real-Time

  • Heo, Youn-Jeong;Cho, Jeong-Ho;Heo, Moon-Beom
    • Journal of Electrical Engineering and Technology
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    • 제7권3호
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    • pp.429-435
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    • 2012
  • In this study, a real-time architecture for the detection of clock jumps in the GPS clock behavior is proposed. GPS satellite atomic clocks have characteristics of a second order polynomial in the long term showing sudden jumps occasionally. As satellite clock anomalies influence on GPS measurements which could deliver wrong position information to users as a result, it is required to develop a real time technique for the detection of the clock anomalies especially on the real-time GPS applications such as aviation. The proposed strategy is based on Teager Energy operator, which can be immediately detect any changes in the satellite clock bias estimated from GPS carrier phase measurements. The verification results under numerous cases in the presence of clock jumps are demonstrated.

Study on Timing Failures in Cyber-Physical Systems

  • Kong, Joon-Ik
    • International journal of advanced smart convergence
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    • 제11권3호
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    • pp.56-63
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    • 2022
  • Cyber-physical systems (CPSs) can solve real problems by utilizing closely connected resources in the cyber world. Most problems arise because the physical world is uncertain and unpredictable. To address this uncertainty, information pouring from numerous devices must be collected in real-time, and each interconnected device must share the information. At this time, CPS must meet timing-related techniques and strict timing constraints that can deliver accurate information within predefined deadlines in order to interact closely beyond simply connecting the cyber and physical worlds. Timing errors in safety-critical systems, such as automobiles, aviation, and medical systems, can lead to catastrophic disasters. In this paper, we classify timing problems into two types: real-time delay and synchronization problems. The results of this study can be used in the entire process of CPS system design, implementation, operation, verification, and maintenance. As a result, it can contribute to securing the safety and reliability of CPS.

무선 PKI 기반의 가상 식별자를 이용한 인증서 검증 (Wireless PKI Based Certificate Verification Using Virtual Identifier)

  • 최승권;신정원;신동화;김선철;이병록;조용환
    • 한국통신학회논문지
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    • 제31권8A호
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    • pp.804-813
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    • 2006
  • 무선 인터넷 서비스의 꾸준한 증가에 따라 무선환경에서 PKI(Public Key Infrastructure) 서비스는 정보보호 서비스를 제공하기 위해 중요하고 기본적인 기술로 대두되고 있다. 본 논문에서는 CSMP에서 VID를 사용하여 통신의 과부하를 감소시키는 인증 방법을 제시하였다. 이는 보안과 실시간 처리, 기존 인증 방법에 대한 성능을 보장한다. 보안과 실시간에서의 성능은 인증자에 의해 인증 노드를 관리함으로써 보증되며 VID를 통해 데이터 전송량을 감소시킬 수 있었다.

실시간 전력계통 시뮬레이터를 이용한 보호계전모델 개발 (Implementation and Verification of Distance Relay Models for Real Time Digital Simulator)

  • 이주훈;윤용범;차승태;이진;최종웅
    • 대한전기학회논문지:전력기술부문A
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    • 제52권7호
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    • pp.393-400
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    • 2003
  • This paper discusses how to implement and verify a software model of the digital relay that can be added to real time digital simulator(RTDS) model library and is then subjected to the same outputs as the actual relay. The software model is stand-alone and can be used with real relays. It is also possible to conduct interactive real-time tests when the system effects of the relay action need to be investigated. The characteristics of mho type and the quadrilateral type, which is commonly used in recently developed relays, are modeled in this paper. Single circuit line and double circuit line system are used for model verification. The transmission lines are each 100 km in length and are modeled as distributed parameter lines but not frequency dependent. The transmission lines in the single circuit system are modeled as ideally transposed line. The mutual coupling data with the parallel line was taken account in the transmission lines for the double circuit system. The main CTs and PTs are included and operated in their linear region during the tests. For the purpose of testing the relay model accuracy the faults have been applied at various points on the protected line. Its accuracy is assessed against theoretical values.

ROI 기반 실시간 이미지 정합 알고리즘 구현 (An Implementation of the Real-time Image Stitching Algorithm Based on ROI)

  • 곽재창
    • 전기전자학회논문지
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    • 제19권4호
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    • pp.460-464
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    • 2015
  • 본 논문은 임베디드 환경에서 실시간으로 동작하기 위해 이미지에 ROI를 지정하고 PROSAC 알고리즘을 적용하여 구현한 파노라마 영상 정합을 제안한다. 기존의 방식은 SURF 알고리즘이나 SIFT 알고리즘과 같이 복잡한 연산과 많은 연산 데이터의 알고리즘을 화면 전체에 적용하여 탐색한다. 또한 outlier 제거 알고리즘으로 RANSAC을 적용하여 알고리즘이 가진 무작위성으로 추가적인 검증 시간을 필요로 한다. 본 논문은 파노라마 영상의 특성을 고려하여 ROI를 설정함으로써 불필요한 연산량을 줄이고 outlier 제거 알고리즘을 검증 시간을 줄인 PROSAC 알고리즘으로 채택하여 처리 속도를 개선하였다. 비교 실험은 ARM Cortex-A15가 내장된 ODROID-XU 환경에서 진행 하였다. 제안하는 방식은 기존의 방식보다 처리 시간이 약 54% 개선되었다.

비행체 제어장치의 성능 해석을 위한 실시간 시뮬레이션 (A Real time Simulation for Performance Analysis of Flight Control System)

  • 곽병철;박양배
    • 대한전기학회논문지
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    • 제35권10호
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    • pp.458-464
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    • 1986
  • This paper introduces a method for design verification and performance evaluation of flight control system. The method is a real time hardware in the loop simulation using the hybrid computer and motion table facility. As a typical illustration, a roll control system of flight vehicle is applied. The simulation validity is demonstrated by comparing hardware test results with analog simulation results.

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