• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.16 no.10
• /
• pp.2207-2216
• /
• 2012

Recently, wireless Internet environment with mobile phones and wireless sensor networks with severe resource restrictions have been actively studied. Moreover, an overall security issues are essential to build a reliable and secure sensor network. One of secure solution is to develop a fast cryptographic algorithm for data encryption. Therefore, we propose a 128-bit stream cipher, AA128 which has efficient implementation of software and hardware and is suitable for real-time applications such as wireless Internet environment with mobile phones, wireless sensor networks and Digital Right Management (DRM). AA128 is stream cipher which consists of 278-bit ASR and non-linear transformation. Non-linear transformation consists of Confusion Function, Nonlinear transformation(SF0 ~ SF3) and Whitening. We show that the proposed stream cipher AA128 is faster than AES and Salsa20, and it satisfies the appropriate security requirements. Our hardware simulation result indicates that the proposed cipher algorithm can satisfy the speed requirements of real-time processing applications.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.30 no.3
• /
• pp.397-403
• /
• 2020

With the convenience of real-time conversation, multimedia file and contact sharing services, most people use instant messenger, and its usage time is increasing. Because the messengers contain a lot of user behavior information data, in the digital forensic investigation, they can be very useful evidence to identify user behavior. However, some of useful data can be difficult to acquire or recognize because they are encrypted or deleted. Thus, in order to use the messenger data as evidence, the study of message decryption process and message recovery is essential. In this paper, we analyze the database encryption process of the instant messenger, MalangMalang Talkafe, and propose the method to decrypt it. In addition, we propose the methods to identify the deleted messages and recover from the volatile memory area.

• Proceedings of the IEEK Conference
• /
• 2002.07a
• /
• pp.313-316
• /
• 2002

This paper presents the design and implementation of a crypto processor, a special-purpose microprocessor optimized for the execution of cryptography algorithms. This crypto processor can be used fur various security applications such as storage devices, embedded systems, network routers, etc. The crypto processor consists of a 32-bit RISC processor block and a coprocessor block dedicated to the SEED and triple-DES (data encryption standard) symmetric key crypto (cryptography) algorithms. The crypto processor has been designed and fabricated as a single VLSI chip using 0.5 $\mu\textrm{m}$ CMOS technology. To test and demonstrate the capabilities of this chip, a custom board providing real-time data security for a data storage device has been developed. Testing results show that the crypto processor operates correctly at a working frequency of 30MHz and a bandwidth o1240Mbps.

• Proceedings of the IEEK Conference
• /
• 2004.06a
• /
• pp.47-50
• /
• 2004

In this paper, we implement an Elliptic Curve Cryptosystem(ECC) processor for DTCP. Because DTCP(Digital Transmission Content Protection) uses GF(p), where p is a 160-bit prime integer, we design a scalar multiplier based on GF(p). The scalar multiplier consists of a modular multiplier and an adder. The multiplier uses montgomery algorithm which is implemented with CSA(Carry-save Adder) and CLA(Carry-lookahead Adder). Our new scalar multiplier has been synthesized using Samsung 0.18 um CMOS technology and the maximum operation frequency is estimated 98 MHz, with the size about 65,000 gates. The resulting performance is 29.6 kbps, that is, it takes 5.4 msec to process a 160-bit data frame. We assure that this performance is enough to be used for digital signature, encryption/decryption, and key exchanges in real time environments.

• Journal of Korea Society of Digital Industry and Information Management
• /
• v.5 no.1
• /
• pp.51-61
• /
• 2009

Conventional DES has been not only shown to have a vulnerable drawback to attack method called 'Meet in the Middle', but also to be hard to use that it is because software implementation has a number of problem in real time processing. This paper describes the design and implementation of the expanded DES algorithm using VHDL for resolving the above problems. The main reason for hardware design of an encryption algorithm is to ensure a security against cryptographic attack because there is no physical protection for the algorithm written in software. Total key length of 352 bits is used for the proposed DES. The result of simulation shows that the inputted plaintext in cryptosystem are equal to the outputted that in decryptosystem.

• Proceedings of the IEEK Conference
• /
• 2000.11b
• /
• pp.144-147
• /
• 2000

Data security is an important issue in today's computer networks. In order to construct a safe infra in the open communication network, a cryptography is necessarily applied to several communication application fields like a high-speed networking system supporting real-time operation. A cryptography which has already realized by a software is designed by using a hardware to improve a throughput. In this paper, we design hardware architecture of IDEA by using a single iterative round method to improve a encryption throughput. In addition, we intend to develop a hardware design methodology that a specific cryptography operate with high-speed. The hardware model is described in VHDL and synthesized by the Samsung KG 80 Library in the Synopsys development software tool. With a system clock frequency 20MHz, this hardware permits a data conversion rate of more than 116 Mbit/s.

• Convergence Security Journal
• /
• v.11 no.1
• /
• pp.19-24
• /
• 2011

This paper describes a passive SID sensor tag that provide physical security functions based on a sensor interface module. It elementarily consists of a serial I/O interface, control module, and sensor module. In this paper, it show tamper-proof security functions by comparison and encryption with the sensor signal data using the physical resistors. The passive SID sensor tag can be realized by the real time management for the safety, forgery, and so on. The proposed SID tag embedded with a sensor module is expected to find wide physical security applications.

• Proceedings of the Korean Information Science Society Conference
• /
• 2003.10a
• /
• pp.847-849
• /
• 2003

최근 악의적인 해킹이나 산업 스파이에 의한 정보유출 등이 날로 늘어남에 따라 정부 차원에서의 관련 법제도 강화나 적극적인 대응에 대한 방법론 등이 크게 대두되고 있다. 이에 컴퓨터 내에 남아있는 전자적 증거들을 실제 법적인 효력을 가지도록 하는 연구가 활발하게 이루어지고 있는 실정이다. 이러한 전자적 증거로서 가장 많이 사용되어지는 것이 로그 정보라 할 것이다. 기존의 로그정보는 분산된 호스트에 따른 관리의 문제와 무결성과 인증의 문제를 지니고 있다. 이 논문에서는 이러한 문제를 해결하기 위해 분산된 로그 정보를 실시간으로 암호화하여 중앙의 특정 서버에 저장하는 방법을 사용한다. 이를 통해 무결성과 출처의 인증이 보장된 실시간 정보에 의한 법적 신빙성을 획득할 수 있다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2009.05a
• /
• pp.793-796
• /
• 2009

감시 카메라는 보안, 감시 등의 목적으로 자주 사용된다. 최근의 감시 카메라는 자체적으로 인코딩 작업을 통해 H.264 영상을 생성하여 보내주기도 하는데, H.264는 높은 압축률으로 폭넓게 사용되는 인코딩 방법이다. 감시카메라는 주로 보안을 위해 사용하므로 위/변조에 강해야 하고 허가받지 않은 사용자가 봐서는 안된다. 대개의 멀티미디어 콘텐츠의 경우 별도의 보안 장치를 설정하기 힘들어 보호에 취약한 면이 있다. 본 논문에서는 이러한 피해를 줄이기 위하여 감시카메라 영상을 암호화 알고리즘을 이용하여 일부 또는 전부를 암호화하는 방법을 구현하였다. 감시카메라로 녹화된 영상을 H.264로 인코딩한 뒤 콘텐츠의 특성을 이용하여 암호화를 부분적으로 혹은 전체를 적용하면 암호화된 콘텐츠를 얻을 수 있다. 본 논문에서 제안하는 내용은 최근 많이 사용되는 감시 카메라 영상의 보호 뿐 아니라 그 외 DMB, 지상파 방송 등의 보편적 서비스에도 적용이 가능하다.

• Annual Conference of KIPS
• /
• 2022.05a
• /
• pp.15-17
• /
• 2022

사물인터넷 기술이 활성화되면서 원격 접속 및 제어가 가능한 스마트 가전기기의 보급이 증가하고 있다. 이에 따라 스마트 가전 기기의 보안취약점을 이용하여 개인정보 유출, 프라이버시 침해 등 사이버 보안 관련 범죄도 같이 증가하는 추세이다. 최근 저성능 디바이스에서 경량 암호를 이용한 안전성 보장 방안에 대한 연구가 진행 중이나, 저성능 디바이스에서 4K/2160p 이상의 영상 데이터를 실시간으로 암·복호화하는 것은 높은 지연시간을 발생시킨다. 본 연구에서는 하드웨어 기반 암호 알고리즘 가속기를 이용하여 저성능 디바이스에서도 구현 가능한 대용량 영상데이터 실시간 암·복호화 시스템을 제안한다.