• 제목/요약/키워드: readout

검색결과 274건 처리시간 0.042초

Digital전자계산기의 철심원리

  • 장문관
    • 전기의세계
    • /
    • 제15권1호
    • /
    • pp.25-27
    • /
    • 1966
  • 상이한 기하학적 형태의 자극철심성질을 사용하여 많은 형태의 논리회로를 만들수 있다. 여기에 소개된 자극철심은 OR, AND, NOT이다. Laddic형태는 AND회로만으로 사용될 수 있고 또 AND회로와 OR회로병용으로 사용된다. 상술한 모든 다공철심은 신뢰도가 높고 조립하기 쉬우면 염가이고 고속 Switching의 정도를 갖이고 있다. MAC회로강의 간단성과 Readout의 지어지지 아니하는 성질때문에 이러한 System의 정비비는 대단히 염가이다.

  • PDF

(주)지에이티

  • 안성환
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2000년도 제18회 학술발표회 논문개요집
    • /
    • pp.47-47
    • /
    • 2000
  • 당사는 진공 및 반도체 장비용 major components 국산화 개발을 전문으로 하는 회사로서 주로 vacuum과 gas control 부문 개발에 역점을 두고 있습니다. 현재 생산 혹은 차후 개발하고자 하는 제품은 다음과 같다. MFC power supply & Readout unit(GMC 1000, GMC 100A, GMC110A), Vacuum Controller(GVC2000, GVC1000, GVC2002), Throttle valve Controller & Pressure Display unit(GPC3000), MFC 등을 생산/판매하고 있다.

  • PDF

승자전취 메커니즘 방식의 아날로그 연상메모리 (An Analog Content Addressable Memory implemented with a Winner-Take-All Strategy)

  • 채용웅
    • 한국전자통신학회논문지
    • /
    • 제8권1호
    • /
    • pp.105-111
    • /
    • 2013
  • 선형적인 읽기와 쓰기 특성을 가지고 있는 승자전취메커니즘 방식의 아날로그 메모리를 구현하였다. 메모리의 읽기 동작은 연상메모리의 최적 함수 선택을 위하여 절대값 회로와 승자전취메커니즘 회로가 이용된다. 본 연구에서는 병렬의 고속 쓰기와 읽기 동작뿐만 아니라 고집적을 가능하게 하는 시스템 구성이 실현된다. 복수의 메모리 셀의 구현이 더 높은 집적도와 고속의 쓰기 읽기를 위하여 구현된다. 실시간 인식을 위하여 본 연구에서 사용된 함수는 이상적이며 메커니즘의 시뮬레이션을 위하여 MOSIS의 $1.2{\mu}$ 더블폴리 CMOS 공정 파라미터를 사용하였다.

Development of SiPM-based Small-animal PET

  • Lee, Jin Hyung;Lee, Seung-Jae;Chung, Yong Hyun
    • IEIE Transactions on Smart Processing and Computing
    • /
    • 제4권5호
    • /
    • pp.324-329
    • /
    • 2015
  • A decreased number of readout method is investigated to provide precise pixel information for small-animal positron emission tomography (PET). Small-animal PET consists of eight modules, and each module is composed of a $6{\times}6$ array of $2{\times}2{\times}20mm^3$ lutetium yttrium orthosilicate (LYSO) crystals optically coupled to a $4{\times}4$ array of $3{\times}3mm^2$ silicon photomultipliers (SiPMs). The number of readout channels is reduced by one-quarter that of the conventional method by applying a simplified row and column matrix algorithm. The performance of the PET system and detector module was evaluated with Geant4 Application for Emission Tomography (GATE) 6.1 and DETECT2000 simulations. In the results, all pixels of the $6{\times}6$ LYSO array were decoded well, and the spatial resolution and sensitivity, respectively, of the PET system were 1.75 mm and 4.6% (@ center of field of view, energy window: 350-650 keV).

Design and Simulation of Depth-Encoding PET Detector using Wavelength-Shifting (WLS) Fiber Readout

  • An, Su Jung;Kim, Hyun-il;Lee, Chae Young;Song, Han Kyeol;Park, Chan Woo;Chung, Young Hyun
    • IEIE Transactions on Smart Processing and Computing
    • /
    • 제4권5호
    • /
    • pp.305-310
    • /
    • 2015
  • We propose a new concept for a depth of interaction (DOI) positron emission tomography (PET) detector based on dual-ended-scintillator (DES) readout for small animal imaging. The detector consists of lutetium yttrium orthosilicate (LYSO) arrays coupled with orthogonal wavelength-shifting (WLS) fibre placed on the top and bottom of the arrays. On every other line, crystals that are 2 mm shorter are arranged to create grooves. WLS fibre is inserted into these grooves. This paper describes the design and performance evaluation of this PET detector using Monte Carlo simulations. To investigate sensitivity by crystal size, five types of PET detectors were simulated. Because the proposed detector is composed of crystals with three different lengths, degradation in sensitivity across the field of view was also explored by simulation. In addition, the effect of DOI resolution on image quality was demonstrated. The simulation results proved that the devised PET detector with excellent DOI resolution is helpful for reducing the channels of sensors/electronics and minimizing gamma ray attenuation and scattering while maintaining good detector performance.

Dual-Sensitivity Mode CMOS Image Sensor for Wide Dynamic Range Using Column Capacitors

  • Lee, Sanggwon;Bae, Myunghan;Choi, Byoung-Soo;Shin, Jang-Kyoo
    • 센서학회지
    • /
    • 제26권2호
    • /
    • pp.85-90
    • /
    • 2017
  • A wide dynamic range (WDR) CMOS image sensor (CIS) was developed with a specialized readout architecture for realizing high-sensitivity (HS) and low-sensitivity (LS) reading modes. The proposed pixel is basically a three-transistor (3T) active pixel sensor (APS) structure with an additional transistor. In the developed WDR CIS, only one mode between the HS mode for relatively weak light intensity and the LS mode for the strong light intensity is activated by an external controlling signal, and then the selected signal is read through each column-parallel readout circuit. The LS mode is implemented with the column capacitors and a feedback structure for adjusting column capacitor size. In particular, the feedback circuit makes it possible to change the column node capacitance automatically by using the incident light intensity. As a result, the proposed CIS achieved a wide dynamic range of 94 dB by synthesizing output signals from both modes. The prototype CIS is implemented with $0.18-{\mu}m$ 1-poly 6-metal (1P6M) standard CMOS technology, and the number of effective pixels is 176 (H) ${\times}$ 144 (V).