• 대한전기학회논문지
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• 제34권1호
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• pp.1-9
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• 1985

In this study we described Binary-Decision Method Programmable Controller that is faster than conventional Programmable Controller (P.C) using the Boolean method. An algorithm for the optimal BD program was systematically developed by using the incomplete multiple output function and the residual characteristic function. The potential applications of BD programmable controller for the problems of industrial control were illustrated, which include on-off sequential control function and also the tasks involving continuous data processing and PID control. An example was presented that has shown how BD programmable controller and ICU (Industrial Control Unit) controller can be applied to the sequential logics.

• 한국주조공학회지
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• 제3권1호
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• pp.22-27
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• 1983

In this paper, the cupola heat balance has been carried out by using programmable calculator with BASIC language. Computers tend to be used in almost every fields but for many people, computers are not handy yet because of its high equipment cost and its difficult language system. In view of this fact, a desk-top or a hand-held programmable calculator is the pertinent device in its calculation speed, accuracy, and easy programming language (BASIC), let alone its low cost. There have been some attempts to apply them to the foundry,${^{1),2)}}$ but they are little in number. This paper is the first attempt to apply the programmable calculator to the calculation of the cupola heat balance. After several applications in some practicalcases, the program has resulted in very satisfactory results such as saving of time and accuracy.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.371-375
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• 1998

This paper proposes a programmable low pass filter(LPF) to estimate stator flux for speed sensorless stator flux orientation control of induction motors. The programmable LPF is developed to solve the dc drift problem associated with a pure integrator and an analog LPF with fixed pole. of the programmable LPF is located far from the origin in order to decrease the time constant as speed increases. The programmable LPF has the phase and the magnitude compensator to exactly estimate stator flux in a wide speed range. So, the drift problem is much improved and the stator flux is exactly estimated in the wide speed range. The validity of the proposed programmable LPF is verified by speed sensorless vector control of a 2.2[kW] three-phase induction motor.

• Applied Science and Convergence Technology
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• 제23권1호
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• pp.34-39
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• 2014

The programmable switches which control the delivery of electrical signals in programmable logic devices are fabricated using memory technology. Although phase change memory (PCM) technology is one of the most promising candidates for the manufacturing of the programmable switches, the threshold switching material should be added to a PCM cell for realization of the programmable switches based on PCM technology. In this work, we report the impurity-doped $Ge_2Sb_2Te_5$ (GST) chalcogenide alloy exhibiting threshold switching property. Unlike the GST thin film, the doped GST thin film prepared by the incorporation of In and P into GST is not crystallized even at the postannealing temperature higher than $200^{\circ}C$. This specific crystallization behavior in the doped GST thin film is attributed to the stabilization of the amorphous phase of GST by In and P doping.

• Journal of Electrical Engineering and Technology
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• 제3권2호
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• pp.162-166
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• 2008

This paper presents the design and implementation of a 5kW programmable three-phase harmonic generator, which is capable of generating sinusoidal output voltages with adjustable output amplitude and frequency over a wide range as well as arbitrary waveforms. The considered harmonic generator is a linear power amplifier type. This system consists mainly of a power converter to generate and amplify waveform signals, a controller to control the desired output signal and measure the output parameters including voltage and current, and a control program to set the desired output and display the output values. The prototype programmable three-phase harmonic generator has been constructed and tested. Test results show that the developed programmable three-phase harmonic generator performs well.

• Nuclear Engineering and Technology
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• 제44권6호
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• pp.697-708
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• 2012

The majority of instrumentation and control (I&C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I&C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I&C systems. Therefore, existing NPPs are replacing the obsolete analog I&C systems with advanced digital systems. New NPPs are also adopting digital I&C systems because the economic efficiencies and usability of the systems are higher than the analog I&C systems. Digital I&C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.

• ETRI Journal
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• 제42권4호
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• pp.596-607
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• 2020

Scaling is an important operation because of the iterative nature of arithmetic processes in digital signal processors (DSPs). In residue number system (RNS)-based DSPs, scaling represents a performance bottleneck based on the complexity of intermodulo operations. To design an efficient RNS scaler for special moduli sets, a body of literature has been dedicated to the study of the well-known moduli sets {2ⁿ - 1, 2ⁿ, 2ⁿ + 1} and {2ⁿ, 2ⁿ - 1, 2ⁿ⁺¹ - 1}, and their extension in vertical or horizontal forms. In this study, we propose an efficient programmable RNS scaler for the arithmetic-friendly moduli set {2^n+p, 2ⁿ - 1, 2ⁿ⁺¹ - 1}. The proposed algorithm yields high speed and energy-efficient realization of an RNS programmable scaler based on the effective exploitation of the mixed-radix representation, parallelism, and a hardware sharing technique. Experimental results obtained for a 130 nm CMOS ASIC technology demonstrate the superiority of the proposed programmable scaler compared to the only available and highly effective hybrid programmable scaler for an identical moduli set. The proposed scaler provides 43.28% less power consumption, 33.27% faster execution, and 28.55% more area saving on average compared to the hybrid programmable scaler.

• 대한의용생체공학회:의공학회지
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• 제28권3호
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• pp.423-428
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• 2007

Programmable FIR filters are used in various signal processing tasks in medical ultrasound imaging, which are one of the major factors increasing hardware complexity. A widely used method to reduce the hardware complexity of a programmable FIR filter is to encode the filter coefficients in the canonic signed digit (CSD) format to minimize the number of nonzero digits (NZD) so that the multipliers for each filter coefficients can be replaced with fixed shifters and programmable multiplexers (PM). In this paper, a new structure for programmable FIR filters with a improved frequency response and a reduced hardware complexity compared to the conventional shift-and-add architecture using PM is proposed for implementing a very small portable ultrasound scanner. The CSD codes are optimized such that there exists at least one common nonzero digit between neighboring coefficients. Such common digits are then implemented with the same shifters. For comparison, synthesisable VHDL models for programmable FIR filters are developed based on the proposed and the conventional architectures. When these filters have the same hardware complexity, pass-band ana stop-band ripples of the proposed filter are lower than those of the conventional filter by about $0.01{\sim}0.19dB$ and by about $5{\sim}10dB$, respectively. For the same filter performance, the hardware complexity of the proposed architecture is reduced by more than 20% compare to the conventional SaA architecture.

• 전기의세계
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• 제36권7호
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• pp.522-525
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• 1987

본고의 내용은 다음과 같다. 1. Programmable Controller의 역사 및 개요 2. 공장 자동화에서 PLC의 역할 3. PLC의 기술 동향 4. PLC의 시장 동향

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.2274-2277
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• 2003

A cylindrical permanent magnet inside the four-phase permanent magnet (PM) stepping motor is employed as the rotor. The stator has four teeth around, which its coils are wound. The mode of excitation can be classified into 3 modes: single-phase excitation, two-phase excitation and ministep excitation. The ministep drive is a method to subdivide one step into several small steps by means of electronics. The paper presents the programmable ministep technique drive. This technique decodes the results obtained from the counter to locate the data in Read Only Memory (ROM). The Sinusoidal Pulse Width Modulation (SPWM) is transformed to binary file and saved to the ROM. The experiment is performed with the four-phase PM stepping motor and drives from a two-phase programmable sinusoidal ministep signal, instead of square wave. The results show that the performances of the proposed programmable ministep technique drive have high efficiency, smooth step motion, and high speed response. Moreover, the resolution of sinusoidal ministep signal can be controlled by the input frequency (f command).