• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.6
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• pp.2452-2457
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• 2012

When a quality inspection process rejects a product unit, consecutive repeated inspections are sometimes conducted for the rejected unit to reduce a false reject possibility. This paper analyzes a special inspection process that allows up to two times of consecutive testing for each product to decrease type I inspection errors. This study uses a Markov chain to model the steps of the inspection process and a product unit's quality states during inspection. Historical inspection results from a company are used as the data for the Markov chain model. Using the Markov chain model and data, this study analyzes the effect of this special inspection rule on the proportion of the final quality levels and scrap rate. The results demonstrate that this inspection process of possible double testing could help reduce unnecessary rejects and consequently decrease material and production costs.

• Special Issue of the Society of Naval Architects of Korea
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• 2013.12a
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• pp.1-7
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• 2013

In past decades, a maximum standard vessel size for chemical tankers is not normally larger than 55,000 TDW due to the characteristic of chemical product shipment which is so variable but small quantity unlike single product carries such as crude oil tankers. These days, as demand of very large chemical tanker is rising due to the change of market trend of chemical product shipment, 75,000 TDW class chemical tanker has been developed. The newly developed vessel's structure has been designed based on CSR (Common Structural Rule) for double hull oil tankers (hereafter CSR) published by IACS (International Association of Classification Societies). However, due to the large difference from typical oil tankers, many items should be specially considered such as on deck transverse and corrugated bulkheads. In addition, two longitudinal bulkheads without upper stool have been constructed in order to maximise the number of cargo tanks and the volume of each cargo tanks. In this study, key word of the vessel has been briefly reviewed and the structural reliability of the proposed vessel has been investigated.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Proceedings of the Korean Information Science Society Conference
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• 2006.06d
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• pp.43-45
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• 2006

Ubiquitous 핵심에 위치한 RFID(Radio Frequency IDentification)는 관련 H/W 및 S/W 기술의 발전에 따라 RFID 데이터를 수집하고 분석하여 이를 필요로 하는 응용 서비스에게 제공하거나 연동할 수 있는 RFID 데이터 처리 시스템이 요구된다. 본 논문은 EPCglobal의 표준을 따른 EPC-IS(Electronic Product Code Information Service)를 위한 성능 향상 방안을 제안한다. 제안을 바탕으로 구현한 EPC-IS는 Rule 기반의 Connection Point를 지원함으로써 Legacy Enterprise 시스템과 원활히 연동할 수 있을 뿐만 아니라 Policy 기반의 Backup Scheduling을 제공하여 RFID 시스템의 저장소 관리를 효율적으로 할 수 있는 RFID 데이터처리 시스템이다.

• Transactions of Materials Processing
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• v.7 no.3
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• pp.291-297
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• 1998

A forging product in general is made through buster blocker and finisher processes. The dies used in these processes are designed by experienced forging engineers. In the present study an expert system is developed for the finisher die design of axisymmetric hot steel forging. It is a rule based system written in Fortran and AutoLISp operating on a personal computer. In this paper major rules consid-ered in the system are summarized and the capabilities of the system are examined through several examples.

• 제어로봇시스템학회:학술대회논문집
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• 1993.10b
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• pp.132-137
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• 1993

In this paper, a fish drying process control system is proposed, which predicts the proper change with time in weight of the material fish and the drying conditions in advance, based on the performance of skilled worker. In order to implement a human expertise into an automated fish drying process control system, an experimental analysis is made and a model for the process is built. The proposed system divided into two procedures: The procedure before drying and the one during drying. The procedure before drying is for the prediction of necessary drying time. To estimate the necessary drying time, first, the proper change in weight for the product is obtained by using fuzzy reasoning. The condition part of the production rule consists of the factors of fish body and the expected degree of dryness. Kext, the necessary drying time is obtained by regression models. The variables employed in the models are the factors, inferred change in weight and drying conditions. The model for the procedure during drying is also proposed for more accurate estimation, which is described by a system of linear-differential equations.

• 한국경영정보학회:학술대회논문집
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• 2008.06a
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• pp.153-170
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• 2008

Customers' needs change every moment. Profitability of stores can't be increased anymore with an existing standardized chain store management. Accordingly, a personalized store management tool needs through prediction of customers' preference. In this study, we propose a recommending procedure using dynamic customers' preference by analyzing the transaction database. We utilize self-organizing map algorithm and association rule mining which are applied to cluster the chain stores and explore purchase sequence of customers. We demonstrate that the proposed methodology makes an effect on recommendation of products in the market which is characterized by a fast fashion and a short product life cycle.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2004.05a
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• pp.64-66
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• 2004

In general, the algorithms for production scheduling are developed with special objective under the special restrictions. Therefore, there is no common algorithm for APS system applied to various kind of production circumstances. The scheduling algorithm for APS system has to solve any problem that comes from any conditions of product kind, process, resource, machine, special rule for scheduling, and so forth. In addition, the algorithm finds solutions quickly because the need for real time based reschedule comes out often. In this paper, I am going to develop a scheduling algorithm using heuristic and genetic algorithm for APS system applied to various kind of production circumstances quickly and flexibly. The developed APS system with the algorithm will be introduced in this paper, also.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2005.05a
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• pp.517-522
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• 2005

This paper addresses scheduling heuristics for an assembly job-shop that includes at least an assembly process throughout its processes. The assembly job shop has certain characteristics not only considering the precedence relationship between the processes but also considering the processing progress between the parts. In addition, it probably presents a different processing time for the same product according to the order of processes and the point of workable time, due to the difference in the availability of equipments. The paper proposes several priority-based dispatching rules that consider these characteristics of the assembly job-shop, aiming to minimize the total tardiness of products in the shop floor. Computational tests showed that job due date based priority rules significantly outperform existing priority rules in terms of total tardiness.

• Journal of Korean Institute of Industrial Engineers
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• v.12 no.1
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• pp.73-80
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• 1986

This paper deals with the problem of the optimal location of warehouses in the two stage distribution system, i.e., the distribution system where the product is transported from plants to customer areas via warehouses. The Problem is formulated with a zero-one mixed integer programming and an efficient branch and bound algorithm is then used to solve the problem. In order to obtain the solution of this problem, this paper shows the procedure of conversion of two stage distribution system into one stage distribution system. An improved method of solving the linear programming at the nodes and branching decision rule is also showed by this study.