• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.286-291
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• 2000

본 논문에서는 일반적인 EMI 노이즈 개요 및 SMPS(Switching Mode Power Supply)에서의 Noise 발생 메카니즘을 분석하고, 전도성 Noise를 측정하였으며, SMPS에서 발생되는 잡음행태를 분석하여 대책방법을 연구하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.11-19
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit which becomes more serious problem due to the thin gate oxide and small threshold voltage in nanometer CMOS technology and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9V power supply voltage. The simulation results show that the proposed PLL achieves a 88% jitter reduction at 440MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of $40M{\sim}725MHz$ with a multiplication range of 11023, and the RMS and peak-to-peak jitter are 5ps and 42.7ps, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.9
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• pp.2176-2182
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• 2014

In this paper, a phase locked loop with suppressed power supply noise has been proposed. The added negative feedback loop of voltage controlled oscillator(VCO) and power noise detector suppresses the power noise induced jitter variation of VCO down to 1/3. The power noise detector is the modified circuit of frequency voltage converter. The proposed PLL has been designed based on a 1.8V 0.18um CMOS process and proved by HSPICE simulation.

• Journal of Advanced Marine Engineering and Technology
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• v.18 no.2
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• pp.75-82
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• 1994

The existence of peroodic impulse noises in distribution line carrier (DLC) communication system is known to be the most serious obstacle for improving DLC communication quality in reliability and capacity. From the spectral points, impulse noises can be divided into baseband type and modulation type the noise width of whichs are much different each other. With each nose type, this study presents the basic characteristics in relation to what they originate from and how their spectrum properties are revealed. The baseband type impulse noise is normally caused from thyristor circuit running with low switching speed and the modulation type noise from the circuit of switching power supply. The base wave of modulation noise is shown to be the pulsuatic charging current to primary condenser in switching power circuit. The study result indicates also that placing the DLC carrier frequency away the band predominated by modulated noise especially from RCC type switching power circuit is very important in DLC design.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.41-45
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• 2013

Modern electronic devices such as tablets and smartphones are getting more powerful and efficient. The demand in feature sets, functionality and usability increase exponentially and this has posed a great challenge to the design of a power distribution network (PDN). Power rails merging is a popular option used today in a PDN design as numerous power rails are no longer feasible due to form factor limitation and cost constraint. In this paper, the criteria and limitations for power rails merging are discussed. Despite having all the advantages such as pin count reduction, decoupling capacitors sharing, lower impedance and cost saving, power rails merging can however, introduce coupling noise to the system. In view of this, a PDN design with power rails merging that fulfills design recommendations and specifications such as noise target, power well placement, voltage supply values as well as power supply quadrant assignment is extremely important.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1009_1010
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• 2009

This paper presents a power supply system with pre-regulator using zero voltage switching (ZVS) interleaving two-transistor forward converter for high input voltage and high power application. A SMPS has a advantage that a good efficiency, small size and light weight but has a noise problem. A linear power supply system has a advantage that a good stability, low ripple and noise but has a disadvantage that a big size, low efficiency and heat problem. To alleviate these problems, we propose an power supply system using dual ZVS interleaving two-transistor forward pre-regulator. The proposed converter is verified on a 1kW, 50kHz experimental prototype.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.69-74
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• 2013

In this paper, the impact of integrating large number of I/O (Input-Output) and Core power Delivery Network (PDN) on a 6 layers Flip-Chip Ball Grid Array (FCBGA) package is investigated. The impact of core induced supply noise on high-speed I/O interfaces, and high-speed I/O interface's supply noise coupling to adjacent high-speed I/O interfaces' jitter impact are studied. Concurrent stress validation software is used to induce SSO noise on each individual I/O interfaces; and at the same time; periodic noise is introduced from Core PDN into the I/O PDN domain. In order to have the maximum coupling impact, a prototype package is designed to merge the I/O and Core PDN as one while impact on jitter on each I/O interfaces are investigated. In order to understand the impact of the Core to I/O and I/O to I/O noise, the on-die noise measurements were measured and results were compared with the original PDN where each I/O and Core PDN are standalone and isolated are used as a benchmark.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11a
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• pp.326.2-326
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• 2002

A PDP(Plasma Display Panel) module consists of a discharge panel, a SMPS for power supply, driving boards for panel control, and a logic board. Driving boards supply high voltage pulses to induce glow dischargein the PDP panel. The electrical pulses excite the circuit elements and subsequentlyacoustic noises. The main sources of the noise in the circuit are the transformer of SMPS and the power MOSFET of driving boards, and the heat sinks often amplify the noise level. (omitted)

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.589-600
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• 1999

Audible noise of UPS(uninterruptible power supply) with small rated [Xlwer is usually generattxl by the c cooling fan‘ For active noise control for radiated noise of UPS, it is adequate to apply multiple-channel F FXLMS algorithm based on Filten어 x LM~longrightarrow algorithm. In this paper, to reduce the audible noise of UPS‘ Its m noise characteristics of UPS are an띠yzed and active noise control by using 이ffiMOClVlultiple- Reference/ M Multiple-Output) FXLMS algorithm is perf‘onned. Also, noise reduction characteristics are shown by computer S simulation and experimental results.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.5
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• pp.99-103
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• 2022

Millimeter-wave tracking radars operate in various environmental restrictions, thus they demand stable power sources with low noise level under high fluctuation of input voltage. This paper presents the design and implementation of the compact power supply with max power of 727 W for Ka-band tracking radar applications. To meet requirements of voltage accuracy and system efficiency for transceiver circuits, upper plates of buck converters are attached on the covers of power supply for efficient heat dissipation. The proposed power supply achieves system efficiency of 88.4 %, output voltage accuracy of ±2 % and noise level of <1% under full load conditions.