• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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• pp.325-328
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• 2000

This paper has been studied a rower amplifier for IMT-2000 handset. Circuit design is performed and optimized by using HP ADS RF software. Designed amplifier consist of 2 stage, has 25㏈ gain, over 27㏈m output power and about 40% power efficiency. Power amplifier operation frequency range is 1955${\pm}$70MHz. Mask layout of the designed Amplifier consisting of 4 mask. The measured results of these values are satisfying the specification of IMT-2000 handset.

• 전기학회논문지
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• 제66권8호
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• pp.1215-1221
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• 2017

Parametric array transducers are used for highly directional speaker in an air environments. Piezoelectric micromachined ultrasonic transducers for parametric array transducers need DC-biased voltage driving signals in order to get high-directional quality-sound features. The existing power amplifier such as class A amplifiers has low efficiency and require large volume heatsinks. To overcome the above-mentioned disadvantages of the conventional amplifier, this paper proposes a new power amplifier system. The proposed power amplifier system ensures high linearity of output characteristic by utilizing the push-pull class B type amplifier. Furthermore, the proposed power amplifier system gets high efficiency because it contains the DC-DC converter-type power supply which can perform energy recovery and envelope tracking function. Also the paper suggests the detailed circuit topology. Its characteristics are verified by the detailed experimental results.

• 한국통신학회논문지
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• 제27권10C호
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• pp.993-998
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• 2002

전력증폭기에서는 특유의 비선형 특성에 의해 출력에 왜곡이 발생하므로 이를 보상할 수 있는 방안을 강구하여야 한다. 본 논문에서는 쇼트키 다이오드를 직렬로 삽입한 전력증폭기용 프리디스토터의 특성에 관하여 연구하였다. 이를 통해 쇼트키 다이오드의 비선형 특성을 이용한 프리디스토터를 전력증폭기 전단에 삽입하면 전력증폭기를 선형화 시킬 수 있음을 확인하였다. 즉, 입력 신호 레벨이 낮으면 입력된 신호는 전력증폭기로 그대로 들어가지만 입력 신호레벨이 높으면 프리디스토터에서 감쇄되어 전달된다. 그러므로 전력증폭기는 항상 saturation 영역에서만 동작하게 된다. Serenade 8.0을 이용하여 모의 실험을 통해 약 3% 가량의 효율이 개선됨을 확인할 수 있었다. 또한 500MHz에서 2.2㎓까지의 대역 중 1.8㎓ 대역에서 가장 확실한 비선형특성을 얻을 수 있음을 확인하였다.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2000년도 종합학술발표회 논문집 Vol.10 No.1
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• pp.187-190
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• 2000

In this paper, A Feedforward Linear Power Amplifier which is appended a feedback loop for IMT-2000 was designed and fabricated. Feedback loop was used to improve the IMD(Inter-Modulation Distortion) characteristics of the main amplifier. And it is easy to cancel IMD on the min path and control IMD cancellation loop, compared with basic Feedforward Linear Power Amplifier. This feedback loop has the same effect of the Predistroter. So, This power amplifier was improved in IMD characteristics to add the effect of Predistroter to basic Feedforward amplifier. And the disigned power amplifier in this paper represented the 40dBm(10W) output and -55dBc 3rd IMD at center frequency 2.14GHz (@10MHz).

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.326-329
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• 2003

In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.235-245
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• 2014

This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

• 한국전기전자재료학회논문지
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• 제17권2호
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• pp.162-170
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• 2004

A 900MHz CMOS RF power amplifier with digitally controllable output power has been proposed and designed with 0.6${\mu}{\textrm}{m}$ standard CMOS technology. The designed power amplifier was composed of digitally controllable switch mode pre-amplifiers with an integrated 4nH spiral inductor load and class-C output stage. Especially, to compensate the 1ow Q of integrated spiral inductor, cascode amplifier with a Q-enhancement circuit is used. It has been shown that the proposed power control technique allows the output power to change from almost 3dBm to 13.5dBm. And it has a maximum PAE(Power Added Efficiency) of almost 55％ at 900MHz operating frequency and 3V power supply voltage.

• 한국정보통신학회논문지
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• 제7권1호
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• pp.114-121
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• 2003

본 연구에서는 ISM 밴드의 블루투스 응용을 위한 2단 CMOS E급 전력증폭기를 설계하였다. 제안된 전력증폭기는 2.4GHz의 주파수에서 동작하며 0.35um CMOS기술과 Hspice 툴을 이용하여 설계 및 시뮬레이션 되었고 Mentor 툴을 이용하여 레이아웃되었다. 전력증폭기의 구조는 간단한 2단으로 설계하였다. 첫단에는 입력매칭네트웍과 전압증폭단인 전치증폭기로, 둘째단은 최대효율과 최대전력을 위한 E급 전력증폭단과 출력 매칭네트웍으로 구성하였다 내부단은 가장 간단한 구조의 L구조의 매칭네트웍을 이용하여 제작될 전체칩의 크기를 최소화하였다. 본 연구에서 제안된 전력증폭기는 2.4GHz의 동작주파수와 2.5V의 낮은 공급전압에서 25.4dBm의 출력전력과 약 39%의 전력부가효율을 얻을 수 있었다. 패드를 제외한 칩의 크기는 약 0.9${\times}$0.8(mm2)였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2629-2632
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• 2003

This paper presents the harmonics rejection technique and the simulation of a active power filter using power operational amplifier. The proposed active power filter consists of CT(current transformer), harmonics detector and harmonics amplifier. The harmonics detector is a high pass filter using a GIC(Generalized Impedance Converter). The harmonics amplifier consists of a power operational amplifier and passive filters. The simulation has been implemented by OR-CAD program. It is examined whether the proposed active power filter can be realized or not through simple experiments.

• ETRI Journal
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• 제19권2호
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• pp.35-47
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• 1997

A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.