• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.325-328
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• 2000

This paper has been studied a rower amplifier for IMT-2000 handset. Circuit design is performed and optimized by using HP ADS RF software. Designed amplifier consist of 2 stage, has 25㏈ gain, over 27㏈m output power and about 40% power efficiency. Power amplifier operation frequency range is 1955${\pm}$70MHz. Mask layout of the designed Amplifier consisting of 4 mask. The measured results of these values are satisfying the specification of IMT-2000 handset.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.8
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• pp.1215-1221
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• 2017

Parametric array transducers are used for highly directional speaker in an air environments. Piezoelectric micromachined ultrasonic transducers for parametric array transducers need DC-biased voltage driving signals in order to get high-directional quality-sound features. The existing power amplifier such as class A amplifiers has low efficiency and require large volume heatsinks. To overcome the above-mentioned disadvantages of the conventional amplifier, this paper proposes a new power amplifier system. The proposed power amplifier system ensures high linearity of output characteristic by utilizing the push-pull class B type amplifier. Furthermore, the proposed power amplifier system gets high efficiency because it contains the DC-DC converter-type power supply which can perform energy recovery and envelope tracking function. Also the paper suggests the detailed circuit topology. Its characteristics are verified by the detailed experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.993-998
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• 2002

At Power amplifier, distortion of output is appeared because of non-linearlity, so we must study method of compensation for non-linearity. In this paper, it was studied about the characteristic of predistorter using serial schottky diode for an amplifier. As a result, we confirmed that power amplifier was able to linearize when we put predistorter using non-linearity of schottky diode before power amplifier. When input carrier level was low, input carrier was delivered directly into power amplifier but input carrier level was high, input carrier was delivered into power amplifier through predistorter with suppressed level. As a result power amplifier always was at saturation region. Through simulation using serenade 8.0, we have concluded that efficiency was improved about 3%, and predistorter got best linearity at 1.8㎓ between 800㎒∼2.2㎓.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.187-190
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• 2000

In this paper, A Feedforward Linear Power Amplifier which is appended a feedback loop for IMT-2000 was designed and fabricated. Feedback loop was used to improve the IMD(Inter-Modulation Distortion) characteristics of the main amplifier. And it is easy to cancel IMD on the min path and control IMD cancellation loop, compared with basic Feedforward Linear Power Amplifier. This feedback loop has the same effect of the Predistroter. So, This power amplifier was improved in IMD characteristics to add the effect of Predistroter to basic Feedforward amplifier. And the disigned power amplifier in this paper represented the 40dBm(10W) output and -55dBc 3rd IMD at center frequency 2.14GHz (@10MHz).

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.326-329
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• 2003

In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.235-245
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• 2014

This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.2
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• pp.162-170
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• 2004

A 900MHz CMOS RF power amplifier with digitally controllable output power has been proposed and designed with 0.6${\mu}{\textrm}{m}$ standard CMOS technology. The designed power amplifier was composed of digitally controllable switch mode pre-amplifiers with an integrated 4nH spiral inductor load and class-C output stage. Especially, to compensate the 1ow Q of integrated spiral inductor, cascode amplifier with a Q-enhancement circuit is used. It has been shown that the proposed power control technique allows the output power to change from almost 3dBm to 13.5dBm. And it has a maximum PAE(Power Added Efficiency) of almost 55％ at 900MHz operating frequency and 3V power supply voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.114-121
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• 2003

In this paper, low voltage and two stage CMOS Class E RF power amplifier for ISM(Industrial/Scientific/Medical) Open Band is presented. The power amplifier operates at 2.4GHz frequency, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. The power amplifier is simple structure of two stage Class E power amplifier. The design procedure determing matching network was presented. The power amplifier is composed of input stage matching network, preamplifier, interstage matching network, power amplifier, and output stage matching network. The matching networks of input stage and interstage were constituted by pi($\pi$) type and L type respectively. At 2.4GHz operating frequency, and with a 2.5V supply voltage, the power amplifier delivers 23dBm output power to a 50${\Omega}$ load with 39% power added efficiency(PAE).

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2629-2632
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• 2003

This paper presents the harmonics rejection technique and the simulation of a active power filter using power operational amplifier. The proposed active power filter consists of CT(current transformer), harmonics detector and harmonics amplifier. The harmonics detector is a high pass filter using a GIC(Generalized Impedance Converter). The harmonics amplifier consists of a power operational amplifier and passive filters. The simulation has been implemented by OR-CAD program. It is examined whether the proposed active power filter can be realized or not through simple experiments.

• ETRI Journal
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• v.19 no.2
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• pp.35-47
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• 1997

A power amplifier operating at 3.3 V has been developed for CDMA/AMPS dual-mode cellular phones. It consists of linear GaAs power MESFET's, a new gate bias control circuit, and an output matching circuit which prevents the drain terminal of the second MESF from generating the harmonics. The relationship between the intermodulation distortion and the spectral regrowth of the power amplifier has been investigated with gate bias by using the two-tone test method and the adjacent channel leakage power ratio (ACPR) method of CDMA signals. The dissipation power of the power amplifier with a gate bias control circuit is minimized to below 1000 mW in the range of the low power levels while satisfying the ACPR of less than -26 dBc for CDMA mode. The ACPR of the power amplifier is measured to be -33 dBc at a high output power of 26 dBm.