• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.7
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• pp.616-621
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• 2009

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating(ARC) and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si ARC layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layers were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The structure of porous Si layers was investigated with SEM. The formation of a nanoporous Si layer about 100nm thick on the textured silicon wafer result in a reflectance lower than 5% in the wavelength region from 500 to 900nm. Such a surface modification allows improving the Si solar cell characteristics. An efficiency of 13.4% is achieved on a monocrystalline silicon solar cell using the electrochemical technique.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.25-28
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• 2000

A capacitance-type humidity sensors in which porous silicon layer is used as humidity-sensing material was developed. This sensors was fabricated monolithically to be compatible with the typical IC process technology except for the formation of porous silicon layer. As the sensors is made as a mesa structure, the correct measurement of capacitance is expected because it can remove the effect of the parasitic capacitance from the bottom layer and another junctions. To do this, the sensor was fabricated using process steps such as localized formation of porous silicon, oxidation of porous silicon layer and etching of oxidized porous silicon layer. From completed sensors, capacitance response was measured on the relative humidity of 25 to 95% at room temperature. As the result the measured capacitance showed the increase over 300% at the low frequency of 120Hz, and showed little dependence on the temperature between 10 to $40^{\circ}C$.

• Journal of the Korean Ceramic Society
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• v.33 no.10
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• pp.1170-1176
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• 1996

Porous silicon was prepared by anodic reaction. The process was controlled by current density and etching time an the thickness change and the room temperature PL was measured. The thickness of porous silicon was increased with etching time and was decreased after critical time. It was the same as increasing current density. It needed only 15 sec to electropolish the surface of porous silicon above current density 70 mA/cm2. We can understand that increasing etching time leads narrow size of Si column by porous silicon formation mechanism. And the sample with narrow Si column revealed PL blue shift. The specimens were heated in the range of 300-1000$^{\circ}C$ in order to see PL changes. The heat treatment was proceeded in H2 atmosphere vacuum system to avoid oxidation. The PL was disappeared above 600$^{\circ}C$. In high temperature some sintered Si columns were observed in SEM photography. There was no difference of -Hx bonds which was suggested as evidence of hydride compounds luminescence between 500$^{\circ}C$ and 600$^{\circ}C$. Thus it is concluded that quantum confinement is major factor of PL of porous silicon.

• 한국신재생에너지학회:학술대회논문집
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• 2006.06a
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• pp.183-186
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• 2006

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si AR layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layer were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The surface morphology of porous Si layers were investigated using SEM. The formation of a porous Si layer about $0.1{\mu}m$ thick on the textured silicon wafer result in an effective reflectance coefficient $R_{eff}$ lower than 5% in the wavelength region from 400 to 1000nm. Such a surface modification allows improving the Si solar cell characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.8
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• pp.620-627
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• 1998

For chemical microsensors such as humidity and gas sensors, it is essential to obtain a single pore with a large inner surface and straight structure. In this paper, cylindrical macroporous silicon layers have been formed of p-silicon substrate by anodization in HF-ethanol-water solution with an applied current. The pores grew normal to the (100) surface and were uniformly distributed. The pore diameter was approximately $1.5~2{\mu}m$ with a depth of $20~30{\mu}m$ and the pores were not interconnected, which are in sharp contrast to the porous silicon reported previouly for similarly doped p-Si. Porous silicon diaphragms 18 to $200{\mu}m$ thick were formed by anistropic etching in TMAH solution and then anodization. The fabrication of macroporous silicon and free-standing diaphragms is expected to offer applications for microsensors, micromachining, and separators.

• Journal of Integrative Natural Science
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• v.2 no.1
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• pp.45-49
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• 2009

Electrochemical etching of heavily doped p-type silicon wafers (boron doped, <100> orientation, resistivity; $0.8-1.2m{\Omega}/cm$) with different current density resulting two different refractive indices resulted in DBR (Distributed Bragg Reflectors) porous silicon, which exhibited strong in-plane anisotropy of refractive index (birefringence). Dielectric stacks of birefringent porous silicon acting as distributed Bragg reflectors have two distinct reflection bands depending on the polarization of the incident linearly polarized light. This effect is caused by a three-dimensional (in plane and in depth) variation of the refraction index. Optical characteristics of DBR porous silicon were investigated.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1996.06a
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• pp.494-496
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• 1996

The purpose of this study is to investigate the effect of process conditions on pore distribution in porous silicon layer prepared by electrochemical reaction. Porous silicon layers formed on p-type silicon wafer show the network structure of fine porse whose diameters are less than 100${\AA}$. In n-type porous silicon, selective growth was found on the pore surface by wet etching process after PR patterning. And numerical method showed high current density on the pore tip. With this result we confirmed that pore formation has two steps. First step is the initial attack on the surface and second step is the directional growth on the pore tip.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.235-235
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• 2010

The Anti-reflection coating(ARC) properties can be formed on silicon substrate using a simple electrochemical etching technique. This etching step can be improve solar cell efficiency for a solar cell manufacturing process. This paper is based on the removal of silicon atoms from the surface a layer of porous silicon(PSi). Porous silicon is form by anodization and can be obtained in an electrolyte with hydrofluoric. It have demonstrated the feasibility of a very efficient porous Si layer, prepared by a simple, cost effective, electrochemical etching method. We expect our research can results approaching to lower than 10% of reflectance by optimization of process parametaer.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.9 no.6
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• pp.597-600
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• 1999

By periodically varying the current density and etching time during anodic oxidation of crustalline silicon wafers in 15% HF-ethanol solution, we obtained porous silicon multilayers which have periodically varying refractive index. We fabricated the porous silicon microcavity (PSM) which consist of porous silicon multilayers (I), active layer of porous silicon, and porous silicon multilayers (II) and investigated its physical properties. The AFM (Atomic Force Microscope) measurement from the cross section of multilayers (I and II) shows uniformity of high refractive index and low index layers as well as the active layer. We observed the characteristics of Bragg reflector when the thickness of layers was 1/4 and the thickness of active layer was twice of the effective wavelength, which can be used as a filter for specific wavelength. We found the emission characteristic from the PSM, which FWHM (full width half maximum) was considerably decreased and emission intensity was increased.

• Journal of Powder Materials
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• v.22 no.1
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• pp.15-20
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• 2015

The composite of porous silicon (Si) and amorphous carbon (C) is prepared by pyrolysis of a nano-porous Si + pitch mixture. The nano-porous Si is prepared by mechanical milling of magnesium powder with silicon monoxide (SiO) followed by removal of MgO with hydrochloric acid (etching process). The Brunauer-Emmett-Teller (BET) surface area of porous Si ($64.52m^2g^{-1}$) is much higher than that before etching Si/MgO ($4.28m^2g^{-1}$) which indicates pores are formed in Si after the etching process. Cycling stability is examined for the nano-porous Si + C composite and the result is compared with the composite of nonporous Si + C. The capacity retention of the former composite is 59.6% after 50 charge/discharge cycles while the latter shows only 28.0%. The pores of Si formed after the etching process is believed to accommodate large volumetric change of Si during charging and discharging process.