• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.25-35
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• 2001

In order to analyze the electrical characteristics of complicated thin film transistor-liquid crystal display (TFT-LCD) array circuits, it is indispensible to use simulation programs such as PSPICE and AIM-SPICE. In this paper, we present a systematic method of extracting the input parameters of poly-Si TFT for SPICE simulations. This method was applied to two different types of poly-Si TFTs, fabricated by excimer laser annealing and silicide mediated crystallization methods, and yielded good fitting results to experimental data. Among the SPICE simulators, PSPICE has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT device model to the PSPICE simulator, and analyzed easily the electrical characteristics of pixels considering the line RC delay. The results of this work would contribute to efficient simulations of poly-Si TFT-LCD arrays.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.333-334
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• 2007

This paper describes the characteristics of poly (polycrystalline) 3C-SiC grown on SiOz and AlN substrates, respectively. The crystalline quality of poly 3C-SiC was improved from resulting in decrease of FWHM (full width half maximum) of XRD by increasing the growth temperature. The minimum growth temperature of poly 3C-SiC was $1100^{\circ}C$. The surface chemical composition and the electron mobility of poly 3C-SiC grown on each substrate were investigated by XPS and Hall Effect, respectively. The chemical compositions of surface of poly 3C-SiC films grown on $SiO_2$ and AlN were not different. However, their electron mobilities were $7.65\;cm^2/V.s$ and $14.8\;cm^2/V.s$, respectively. Therefore, since the electron mobility of poly 3C-SiC films grown on AlN buffer layer was two times higher than that of 3C-SiC/$SiO_2$, a AlN film is a suitable material, as buffer layer, for the growth of poly 3C-SiC thin films with excellent properties for M/NEMS applications.

• Macromolecular Research
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• v.14 no.2
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• pp.205-208
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• 2006

A polymeric film of a biodegradable poly(1,5-dioxepan-2-one) (PDXO) was formed on a gold surface by a combination of the formation of self-assembled monolayers (SAMs) presenting hydroxyl groups and the surface-initiated, ring-opening polymerization (SI-ROP) of 1,5-dioxepan-2-one (DXO). The SI-ROP of DXO was achieved by heating a mixture of $Sn(Oct)_2$, DXO, and the SAM-coated substrate in anhydrous toluene at $55^{\circ}C$. The resulting PDXO film was quite uniform. The PDXO film was characterized by polarized infrared external reflectance spectroscopy, X-ray photoelectron spectroscopy, time-of-flight secondary ion mass spectrometry, atomic force microscopy, ellipsometry, and contact angle goniometry.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.314-317
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• 2000

In order to analyze the characteristics of complicated TFT-LCD (Thin Film Transistor-Liquid Crystal Display) circuits, it is indispensible to use simulation programs. In this study, we present a systematic method of extracting the input parameters of poly-Si TFT for Spice simulation. This method is applied to two different types of poly-Si TFTs fabricated in our group with good results. Among the Spice simulators, Pspice has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT model on the Pspice simulator, which would contribute to efficient simulations of poly-Si TFT-LCD pixels and arrays.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.356-356
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• 2010

In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.05a
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• pp.90-93
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• 1996

The conduction mechanisms of the off-current in low temperature ($\leq$600$^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT's) has been systematically studied. Especially, the temperature and bias dependence of the off-current between unpassivated and passivated poly-Si TFT's was investigated and compared. The off-current of unpassivated poly-Si TFT's is due to a resistive current at low gate and drain voltage, thermal emission current at high gate, low drain voltage, and field enhanced thermal emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation, it was observed that the off-currents were remarkably reduced by plasma-hydrogenation. It was also observed that the off-currents of the passivated poly-Si TFT's are more critically dependent on temperature rather than electric field.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.13-16
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• 2009

In this study, AlN thin films were deposited on a polycrystalline (poly) 3C-SiC buffer layer for surface acoustic wave (SAW) applications using a pulsed reactive magnetron sputtering system. AFM, XRD and FT-IR were used to analyze structural properties and preferred orientation of the AlN/3C-SiC thin film. Suitability of the film in SAW applications was investigated by comparing the SAW characteristics of an interdigital transducer (IDT)/AlN/3C-SiC structure with the IDT/AIN/Si structure at 160 MHz in the temperature range $30-150^{\circ}C$. These experimental results showed that AlN films on the poly 3C-SiC layer were highly (002) oriented. Furthermore, the film showed improved temperature stability for the SAW device, $TCF\;=\;-18\;ppm//^{\circ}C$. The change in resonance frequency according to temperature was nearly linear. The insertion loss decrease was about $0.033dB/^{\circ}C$. However, some defects existed in the film, which caused a slight reduction in SAW velocity.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.368-369
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• 2008

This paper describes the mechanical properties of poly(polycrystalline) 3C-SiC thin film with various doping concentration, in which poly 3C-SiC thin film's mechanical properties according to the n-doping concentration 1%$(9.2\times10^{15}cm^{-3})$, 3%$(5.2\times10^{17}cm^{-3})$, and 5%$(6.8\times10^{17}cm^{-3})$ respectively was measured by nano indentation. In the case of $9.2\times10^{15}^{-3}$ n-doping concentration, Young's Modulus and hardness were obtained as 270 GPa and 30 GPa, respectively. When the surface roughness according to n-doping concentrations was investigated by AFM(atomic force microscope), the roughness of poly 3C-SiC thin film doped by 5% concentration was 15 nm, which is also the best of them.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1085-1087
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• 1995

A large leakage current may be one of the critical issues for poly-silicon thin film transistors(poly-Si TFTs) for LCD applications. In order to reduce the leakage current of poly-Si TFTs, several offset gated structures have been reported. However, those devices, where the offset length in the source region is not same as that in the drain region, exhibit the asymmetric electrical performances such as the threshold voltage shift and the variation of the subthreshold slope. The different offset length is caused by the additional mask step for the conventional offset structures. Also the self-aligned implantation may not be applicable due to the mis-alignment problem. In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photo resistor reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate from both sides of the main gate. The poly-Si channel layer below the offset oxide is protected from the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of our new device is the offset lesion due to the offset oxide. Our experimental results show that the offset region, due to the photo resistor reflow process, has been successfully obtained in order to fabricate the offset gated poly-Si TFTs. The advantages of the proposed device are that the offset length in the source region is the same as that in the drain region because of the self-aligned implantation and the proposed device does not require any additional mask process step.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.254-257
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• 2009

The crystallization and activated annealing effect of Si films using an excimer laser and a new CW blue laser are described comparing with furnace annealing (SPC) for the application of advanced TFTs and future applications. Currently, pulsed ELA is used extensively as a LTPS process on glass substrates as the efficiency is high in UV region for thin Si film of 40- 60 nm thickness. ELA enables extremely low resistivity for both n- and p-typed Si films. On the other hand, CW BLDA enables the smooth Si surface having arbitral grains from micro-grains to anisotropic huge grain structure only controlling its power density.