• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.05c
• /
• pp.208-212
• /
• 2003

Silicon transient voltage suppressors (TVSs) are clamping devices that limit voltage spikes by low impedance avalanche breakdown of a rugged silicon PN junction. They are used to protect sensitive components from electrical overstress such as that caused by induces lightning, inductive load switching and electrostatic discharge. In this paper, we present static and dynamic characteristics of TVS diode using thermal analysis simulation software. And also, it is presented that the thermal dissipation characteristics of TVS diode in the transient state.

• Proceedings of the KIEE Conference
• /
• 1996.11a
• /
• pp.363-366
• /
• 1996

A FB-ZVS(Full Bridge Zero Voltage Switching) PWM DC/DC converter for electric vehicles is simulated and implemented in this paper. The converter considered is a step-down DC/DC converter with the ratings of 312/13.5V and 1.35kW. The steady state operation of this converter is divided into six operating modes in case of continuous current mode and eight operating modes in case of discontinuous current mode. Digital simulations using PSpice are carried out to verify the steady-state analysis. A prototype converter was built in the laboratory. MOSFETs were used for swithching devices and fast recovery diodes to reduce the charge storage problem of a pn-junction.

• Journal of the Optical Society of Korea
• /
• v.15 no.1
• /
• pp.1-3
• /
• 2011

We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and $P^+$/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the $P^+$/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.

• Journal of the Korean Society of Radiology
• /
• v.3 no.1
• /
• pp.11-15
• /
• 2009

In this study, the basic research verifying possibility of applications as radiology image sensor in Digital Radiography was performed, the radiology image sensor was fabricated using a multi-layer technique to decrease dark current. High efficiency materials in substitution for Amorphous Selenium(a-Se) have been studied as a direct method of imaging detector in Digital Radiography to decrease dark current by using PN junction or Hetero junction already used as solar cell, semiconductor. Particle-In -Binder method is used to fabricate radiology image sensor because it has a lot of advantages such as fabrication convenient, high yield, suitability for large area sensor. But high leakage current is one of main problem in Particle-In -Binder method. To make up for the weak points, multi-layer technique is used, and it is considered that high efficient digital radiation sensor can be fabricated with easy and convenient process. In this study, electrical properties such as leakage current, sensitivity, signal linearity is measured to evaluate multi-layer radiation sensor material.

• Radiation Oncology Journal
• /
• v.7 no.1
• /
• pp.93-100
• /
• 1989

Several combinations of measuring devices and phantoms were studied to measure electron beams. Silicon Pmt junction diode was used to find the dependence of depth dose profile on field size on axis of electron beam Depths of 50, 80 and $90\%$ doses increased with the field size for small fields. For some larger fields, they were nearly constant. The smallest of field sizes over which the parameters were constant was enlarged with increase of the energy of electron beams. Depth dose distributions on axis of electron beam of $10\times10cm^2$ field were studied with several combinations of measuring devices and phantoms. Cylindrical ion chamber could not be used for measurement of surface dose, and was not convenient for measurement of near surface region of 6MeV electron. With some exceptions, parameters agreed well with those studied by different devices and phantoms. Surface dose in some energies showed $4\%$ difference between maximum and minimum. For 18MeV, depths of 80 and $90\%$ doses were considerably shallower by film than by others. Parallel-plate ion chamber with polystyrene phamtom and silicon PN junction would be recommended for measurement of central axis depth dose of electron beams with considerably large field size. It is desirable not to use cylindrical ion chamber for the purpose of measurement of surface dose or near surface region for lower energy electron beam. It is questionable that film would be recommended for measurement of dose distribution of electron with high energy like as 18MeV.

• Korean Journal of Materials Research
• /
• v.30 no.10
• /
• pp.509-514
• /
• 2020

The two key variables of an Si solar cell, i.e., emitter (n-type window layer) and base (p-type substrate) doping levels or concentrations, are studied using Medici, a 2-dimensional semiconductor device simulation tool. The substrate is p-type and 150 ㎛ thick, the pn junction is 2 ㎛ from the front surface, and the cell is lit on the front surface. The doping concentration ranges from 1 × 10¹⁰ cm^-3 to 1 × 10²⁰ cm^-3 for both emitter and base, resulting in a matrix of 11 by 11 or a total of 121 data points. With respect to increasing donor concentration (Nd) in the emitter, the open-circuit voltage (Voc) is little affected throughout, and the short-circuit current (Isc) is affected only at a very high levels of Nd, exceeding 1 × 10¹⁹ cm^-3, dropping abruptly by about 12%, i.e., from Isc = 6.05 × 10^-9 A·㎛^-1, at Nd = 1 × 10¹⁹ cm^-3 to Isc = 5.35 × 10^-9 A·㎛^-1 at Nd = 1 × 10²⁰ cm^-3, likely due to minority-carrier, or hole, recombination at the very high doping level. With respect to increasing acceptor concentration (Na) in the base, Isc is little affected throughout, but Voc increases steadily, i.e, from Voc = 0.29 V at Na = 1 × 10¹² cm^-3 to 0.69 V at Na = 1 × 10¹⁸ cm^-3. On average, with an order increase in Na, Voc increases by about 0.07 V, likely due to narrowing of the depletion layer and lowering of the carrier recombination at the pn junction. At the maximum output power (Pmax), a peak value of 3.25 × 10^-2 W·cm^-2 or 32.5 mW·cm^-2 is observed at the doping combination of Nd = 1 × 10¹⁹ cm^-3, a level at which Si is degenerate (being metal-like), and Na = 1 × 10¹⁷ cm^-3, and minimum values of near zero are observed at very low levels of Nd ≤ 1 × 10¹³ cm^-3. This wide variation in Pmax, even within a given kind of solar cell, indicates that selecting an optimal combination of donor and acceptor doping concentrations is likely most important in solar cell engineering.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.08a
• /
• pp.395-396
• /
• 2011

본 논문에서는 30% 내외의 평균반사율을 가지는 다결정 실리콘 태양전지의 입사광 손실을 최소화하여 광전변환효율 극대화를 구현하기 위해서 SF6/O2 혼합가스를 이용한 RIE 표면 texturing 공정을 수행하였다. 현재 다결정 실리콘 태양전지는 다양한 방향의 grain을 가지기 때문에 단결정 실리콘에 적용되는 습식 식각 방식이 다결정 실리콘 표면 texturing에 적절하지 않은 것으로 알려져 있다. 이를 개선하기 위해서 이방성 식각 특성을 가지는 다양한 texturing 방법이 시도되고 있다. 대표적으로 기계적인 방식의 V-grooving, 레이저 grooving, 플라즈마 건식식각을 이용한 texturing 및 산 용액을 이용한 texturing 등의 연구가 보고되고 있다. 그 중에서 플라즈마 건식식각 방식의 하나인 RIE를 이용한 표면 texturing 공정이 간단한 공정과 산업계 응용의 용이성 때문에 활발히 연구되어 왔다. 특히 Sandia group과 일본 Kyocera사의 연구 결과에서는 그 가능성을 입증하고 있다. 본 연구에서는 공정의 단순화와 안전한 공정을 위해서 SF6/O2 혼합 가스를 이용하여 마스크 패턴 공정없이 RIE texturing 공정을 수행하였으며, RIE-textured 다결정 실리콘에 대해서 태양전지를 제작하여 표면 texturing이 광전변환효율에 미치는 영향에 대해서 분석하였다. 그 결과 SF6/O2 혼합 가스를 이용한 RIE texturing은 다결정 실리콘 표면에 주로 needle 구조를 형성하는 것을 확인하였다. 각 texturing 조건별 반사율의 차이는 needle 구조의 조밀도와 관련되는 것을 알 수 있었으며, 동일 공정 parameter 상에서 식각 시간 1, 2, 3, 4, 5분 기준 시간에 따른 표면 구조 분석 결과 seed 가 형성되고 그에 따라서 needle 형태로 식각되는 과정을 관찰하였다. 반사율은 분당 약 4%씩 낮아져 5분 식각 후 14.45% 까지 낮아졌으며, 표면 구조에서 폭은 약 30 nm로 모두 일정하며, 길이가 약 20, 30, 50, 80, 100 nm으로 증가되었다. 이 결과로 보아 seed로부터 needle 구조가 심화되어가는 것을 알 수 있었다. 시간에 따른 RIE texturing 후 제작된 태양전지는 효율이 1분 식각 기준 15.92%에서 약 0.35% 씩 낮아져 5분 식각 후 14.4%로 낮아졌다. Voc 는 texturing 시간에 관계없이 일정하며 Isc가 점점 감소되는 것으로 확인되었다. EQE 결과도 이와 동일하게 RIE texturing 시간이 길어질수록 전체 파장 범위에서 일정하게 낮아지는 것이 관찰되었다. Electroluminescence(EL) 이미지 결과 texturing 시간이 길어진 태양전지일수록 점점 어두운 이미지가 나타나 5분 식각의 경우 가장 어두운 결과를 나타내었다. 이런 결과는 한 가지 이유보다는 복합적인 문제로 예상되는데 궁극적으로는 RIE 공정 후 표면에 쌓인 charged particle들이 trap 준위를 형성하여 효율 및 공정상에 영향을 미친 것으로 보이며, 특히 잔류 O기가 불균일한 산화막을 형성하는 것으로 예상된다. 또한 EL 분석 결과를 볼 때 RIE texturing 공정이 길어질수록 불안정한 pn-junction을 형성하는 것을 확인하였으며, emitter 층 형성 후 PSG (phosphorous silica glass) 공정에서 needle의 상부 구조가 무너지면서 면저항이 증가된 결과로 분석된다. PSG 제거 후 측정된 면저항의 경우 3분 texturing 샘플부터 면저항이 약 4${\Omega}/sq$ 정도 증가됨을 확인하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.36 no.4
• /
• pp.413-417
• /
• 2023

Gallium Oxide (Ga₂O₃) is preferred as a material for next generation power semiconductors. The Ga₂O₃ should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga₂O₃ is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu₂O. Research the lateral-type FET structure of NiO/Ga₂O₃ heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×10¹⁷ to 1×10¹⁹ cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at I_D = 1×10^-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga₂O₃ region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at I_D =1×10^-3 A/mm.

• Journal of Sensor Science and Technology
• /
• v.7 no.6
• /
• pp.426-431
• /
• 1998

This paper describes electrochemical etch-stop characteristics in THAH/IPA/pyrazine solution. I-V curves of n- and p-type Si in THAH/IPA/pyrazine solution were obtained. OCP(Open Circuit Potential) and PP (Passivation Potential) of p-type Si were -1.2 V and 0.1 V, and of n-type Si were -1.3 V and -0.2 V, respectively. Both n- and p-type Si, etching rates were abruptly decreased at potentials anodic to the PP. The etch-stop characteristics in THAH/IPA/pyrazine solution were observed. Since accurate etching stop occurs at pn junction, Si diaphragms having thickness of epi-layer were fabricated. Etching rate is highest at optimum etching condition, TMAH 25wt.%/IPA 17vol.%/pyrazine 0.1g/100ml. thus the elapsed time of etch-stop was reduced.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.1
• /
• pp.1-11
• /
• 2002

In this paper, new simple method for the calculation of depletion region under complex geometry and general purpose numerical simulator that could handle this were developed and applied in the analysis of SCM with nanoscale tip, which is a promising tool for high resolution dopant profiling. Our simple depletion region seeking algorithm alternatively switches material of elements to align ionized element boundary with contour of zero potential. To prove the validity of our method we examined whether our results satisfy the definition of depletion region and compared those with known values of un junction and MOS structure. By modeling of capacitance based on the shape of depletion region and potential distribution, we could calculate the CV curve and dC/dV curve between silicon substrate and nanoscale SCM tip.